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ISO5852S: Simulation in LTspice

Part Number: ISO5852S

Team,

my customer wants to simulate their circuit in LTspice. They are using our PSpice transient model (rev A) and the unencrypted PSpice transient model.
The simulation is running very slow and often aborts or convergence errors.

Do you have any tips to make the simulation better?

Thanks!

  • Franziskus, 

    If you could share schematic or even the sim files, it would help, although we dont officially support LTSPICE. 

    Usually the switching simulation are not extremely complex, and just like a single device or a half bridge configuration and dont run for long.  Sometimes the models do have issue particularly when one "Floats' like in highside. 

    Mostly I see convergence issues happening for initial conditions at like 1e-12 second, not during running. 

    I dont know exactly what is happening with their simulation without more detail but I can provide some tips below:

    I've often been able to resolve the convergence error by

    * changing the setting for initial condition calculation setting,

    setting .IC at any nodes of interest, e.g. setting initial current on Inductor (e.g. load inductor), set IC on certain caps. 

    Relaxing certain ITOL/VTOL settings (suggestions are online), this type of solution is usually not applicable to the types of simulations we are running tho and common issues encountered with gate driver circuit simulation. 

    THe models can also be sensitive to grounding and not converge. If the customers secondary side is not tied to the primary side ground, it may need to be tied with a voltage source. I have had problems in the past using resistors with some models. 

    You can also try to isolate the problem-causing component, by removing more and more from the circuit unti lit starts converging. This is kind of a simple method, but since I am by no means a PSPICE guru this is often a good starting point for me. 

    Let me know if this helps and if you have any more questions. 

    Best

    Dimitri