TLV755P: an inrush current at Power ON

Kami Huang60

Part Number: TLV755P

Dear Sir/Ms.

My customer does the LDO startup test on his product. He found that the current of Iout will be very large when the voltage of Vout is rising (Power on). Peak=728mA, the time exceeding 500mA is 220μs.
Is this phenomenon normal?
The following is the customer's circuit diagram and the test waveform.

We probe VCC, EN, VDD, Iout

Best Regards,

Kami Huang

over 2 years ago

+1 Srikanth Lolla Venkata over 2 years ago

TI__Genius 12040 points

Hello Kami,

The profile of the inrush current does look typical. The device has a built-in current limit set to 725mA (typical), so it is not surprising to see the peak value of 728mA. Using a soft start cap or reducing output capacitor helps reduce inrush current. However this device does not have an NR/SS pin and you are already operating with minimum recommended output cap (1uF), so unless adding external components is an option, please ensure that your PCB design can handle this inrush current. Here is a link that describes inrush currents in more detail : https://www.ti.com/lit/an/slva670a/slva670a.pdf?ts=1639750345879&ref_url=https%253A%252F%252Fwww.google.com%252F. Thanks!

Regards,

Srikanth

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TLV755P: an inrush current at Power ON