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LMG3410R070: LMG3410R070

Part Number: LMG3410R070
Other Parts Discussed in Thread: ISO722

While using the GanFET at Half- Bridge configuration, we started getting random Fault signals and FET Shuts down

After further investigation we found out that fault caused by the Half Bridge Lower FET 5V LDO under voltage condition  (picture below)

During fault we measured the 5V LDO sink about 10mA (2mA is normal current)

We could stop the fault condition by providing external regulated 5V into the LDO output.

This Half bridge topology is a standard design used in other circuit, it is only in this specific design were it happens in multiply boards. 

1. Any idea for the  reason of this behavior

2. Does using external Reg for 5V LDO acceptable solution 

3. Can we do a long term damage if we continue working with Ext 5V or 10mA sink current 

Appreciate your support

Ziv 

  • Hi Ziv,

    Thanks for your question. The LDO5V is the output from GaN and therefore there is no need to supply from an external source. May I ask where the 5V is going to? If it is connected to an external digital isolator, it may be driving it below the threshold. Could you also check if LDO5V UVLO is causing a fault? This could also lead to another explanation.

    Thanks,

    Noah

  • Hi Noah

     

    The 5V LDO is going into a digital Isolator ADUM3201, which was previously ISO722  with same results.

    The 10mA current is not going to the Isolator, this was verified.  

    We have the problem only on the Low FET, the 10mA seems to be to much for the LDO which cause the 5V under voltage,

    The Fault condition of the LMG341 is a combination of a few conditions , but from all the tests we conducted the 5V seems to be the one which is causing the fault.

    As seen in the picture, it is clear that the 5V goes to under voltage and when we add external support which can deliver 10mA, we get a stable 5V and the faults stops.

    The Low frequency on the 5V is caused since every fault is shutting down the converter

     

    The below is a standard application for us and we understand that what we see is not typical, as nothing seems to help we are looking for other explanation, for some sensitivity on the FET which might cause it.

    What is the 5V used for inside the chip?

    On all other circuits both High and Low FETs requires only 1-2mA.

    Appreciate your support   

     

    Ziv

  • The external 5V pushed into the 5V LDO eventually failed. seems like the LDO doesn't like it.

    We have no idea why the 5V is dropping, everything else looks good, any ideas?

    Ziv

  • Hi Ziv,

    Could you clarify where you are adding the external support to deliver the 10mA?

    Additionally, could you please measure the Fault, LDO5V, and VNEG pins all together? This well help us understand the timing of the issue.

    As for the 5V inside the chip, it is used for the logic circuits for the protection features.

    Thanks,

    Noah

  • Hi Noah,

    I get the 10mA when connecting external 5V into the LDO, it can get up to 90mA depends on PWM D.C.

    VNEG always good and clean, same is Vdd

    Fault High follows 5V, till 5V drops to about 4V, then Fault S.D the FET and 5V recovers. See drawing below

    All problems starts with the 5V LDO, why is it dropping. I disconnected it from the rest of the circuit with the same result while nothing is connected to it.

    Can we continue by phone, matter is urgent ?

    Thanks,

    Ziv

     

  • Hi Ziv,

    I can set up a Webex call for tomorrow if that works for you. I will follow up with an email.

    Thanks,

    Noah

  • that would be great

    Thanks

  • Moving correspondence to email.

    Thanks,

    Noah