This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV62084A: Power good multi-rail issues

Part Number: TLV62084A
Other Parts Discussed in Thread: TLV62084


I'm facing some issues when designing a board using these DC/DC converters. Both of the issues are related to the PG signal:

  1. When using the PG signal the datasheet says: "The power good output requires a pull-up resistor which is recommended connecting to the device output." [page 10]

    Does this mean I can't never connect the PG pull-up to the input voltage? Since I'm using more than one device of this P/N, and the EN signal has a threshold value of 1V, I wouldn't like to connect the PG pull-up resistor to a 0.9V output of another of the converters, because it would not Enable the next converter.

    If I could connect the pull-up resistor to the 5V input, it would be much more easier to achieve the power-up sequence I need.

  2. In page 11, of the datasheet there is Table 3, which has two different conditions for EN=HIGH signals: VFB >= VPG or VFB <=VPG . So, the problem is I don't really understand when VFB will be greater than VPG, or even what voltage is VPG...

    VFB is stated to be 0.45V. VPG, to me, should be the voltage on the PG pin which will be set by the pull-up resistor. But, as the converter's output range goes from 0.5V to 4V and the datasheet recommends to connect PG to the output... VPG will ALWAYS be greater than VFB.

    So, either is something wrong in the datasheet or either I'm wrong understand it.

I'll kindly ask for someone to shed some light on this issues.


  • Hello Francisco,

    PG can also be pulled up to system rail with a pull up resistor but by making sure that the PG pin rating mentioned in the datasheet has not exceeded.

    The PG pin behavior of TLV62084A is also explained in detail in this application note:

    I hope it can help you more in understanding it better. 

    Also please remember that there is a difference between PG pin behavior of TLV62084 and TV62084A. (Table 2 and Table 3 in D/S).

    2) Coming to your second point, yes you are right VPG is voltage that you get the PG pin with a pull up resistor. So if you have a look at below graph, there is a time when Vout is rising or during the softstart delay before Vout starts to rise, PG pin is low for TLV62084A there (VPG<=VFB) will be valid

    I hope it clears your points.

    Thanks and Best Regards,


  • Thanks for your help @Farheen.

    I haven't seen the application note before, and helps to understand the PG behaviour.