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LM62460-Q1: Thermal management

Part Number: LM62460-Q1
Other Parts Discussed in Thread: LM62460

Dear TI,

I am working on the thermal design of LM62460 based converter and I have some questions regarding the IC thermal properties.

RthJB is given in datasheet and a note in layout chapter: "the package of this device dissipates heat through all pins". It means for me that all pins have a same thermal conduction properties (in point of view the junction-board path) and no one connected directly to the die like an exposed pad. Is it true, can be calculated all pins as an isothermal "area"? If not, than witch pins have better thermal resistance?

I want to use the high current pins (VIN, GND) to lead heat from the IC, similar than the example layout in datasheet. But this example a little bit strange for me, because VIN polygons are minimalized on top layer. If they have same thermal properties as GND pins, then bigger VIN polygons should be used to spread heat on top layer instead of the thinner inner layers. 

summarizing my questions: Is there any pin that thermally connected to the die? VIN or GND pin has better thermal conduction/resistance?

Thanks in advance!

  • Hi,

    I would suggest using the EVM thermal resistance (21.6 C/W) which is a value that has been actually measured on the EVM. Using 21.6C/W assumes that your PCB layout is similar to EVM layout and layer stackup. 

    It is recommended to have unbroken GND plane for thermal flow. Refer to Section 11.1.1 in the datasheet for more ground and thermal consideration information. It is generally good to have large VIN copper plane in order to reduce the parasitic inductance and voltage drop across the trace to maximize efficiency. 

    Large VIN and large GND plane with adequate vias to connect to the system GND plane will help dissipate heat out of the device.

    Please refer to Figure 11-2 for a layout example of the EVM. 

    Regards,

    Jimmy