BQ79614-Q1: Is it possible to damage VCx/CBx internal protection during hot-plug?

HI Fatjon,

In general the hotplug robustness is achieved by a proper selection of the RC network and connection to ensure that during the hotplug most of transient current is flowing through the external RC ladders. Could you share the schematic, to check the RC component selection, if any busbar used and how the BBP/N connect, and do you have different connector specifically for BAT and GND? What's the sequence for each connector when you try to plug battery to the board?

Hi Ted and thank you for replying! 

We selected the RC network as recommended in the design recommendetions document. We're not using BUS BAR measure, dedicated pins BBP and BBN shorted together to simulate a 0V measure. All input channels are used to measure and balance as recommended. All connectors are the same type, there isn't any plug order, that's why there is an high risk of contacting first VCx/CBx and GNDs before BAT connector that supplies BAT and LDOIN. 

So we're wondering if we can do anything else to avoid VCx/CBx internal protection damage due to hot-plug (considering the hot-plug case as described before). 

We can isolated GNDs (all BQs GNDs shorted together as recommended) from negative reference of the battery module monitored by the BQ, using a MOS which will be turned on only when BAT connector and external negative reference has contacted. To turn on that MOS we can use for example TSREF (unless there could be any back powering from VCx/CBx that would turn on LDOIN and then TSREF, could it be?) or even check the delta voltage from BAT to GNDs. Is it ok? Do you have any other recommendation?

Thank you very much

Fatjon

HI Fatjon,

Actually the worst case would be when you connect the BAT first and followed by the GND, so if you have VCx and GND first before the BAT, that's not the worst case. And I don't see the benefits of adding MOS there as well. Just repeat, we expect the most hotplug transient current to flow through external RC instead of going internal the device and causing any internal damage, through proper RC selection and connection. If you strictly follow design recommendation, it should be ok. Some additional point as below that might help:

1. Tie the NC pins to BAT and make sure to place the cap between the BAT and highest CB pin

2. Add the TVS on the highest VC channel and BAT respectively near connector side before the resistor. If cost and space ok, you can also choose to add TVS on each cell, that will add some addition robustness.

3. Add some small cap(4.7n or 10n) between each VC and GND at near connector side 

Hi Ted,

I agree with you, the mos doesn't cover all the cases, there are to many paths that could occur during hot-plug. Thats why looks like Texas "bet" all in RC filter + low caps (and hidden caps but limiting resistors and linear regulators) at the power rails. My doubts are about internal protections and how much they can protect in long lasting hot-plug events.

What we want to avoid is a path through internal protections of CBx/VCx. Maybe the RC filter is enaugh, because the recommended capacitance at power pins are very low so we don't expect too much inrush and energy. But i don't know the inrush/energy limits of the internal protection and where do the internal protection discharge: typically a diode pointing to the higher power rail, can you or anyone tell me if there is a similar diode and where does it point? Does it point to the BAT pin or to an internal clamp? 
I was thinking to add a schottky diode, pointing to a small capacitance+TVS at the power path (30ohm of BAT and 300ohm of LDOIN) at every connector's pin to bypass the internal protection. Is this an effective bypass enaugh to avoid internal damages? 

Thank you also for the other suggestions, i'll certainly keep it in mind.

HI Fatjon,

No I don't think that's necessary. All VC/CB to VSS(Except for VC0 and CB0) share the same abs max. So you can place one TVS (e.g. 75V TVS) at the highest channel and PWR of each AFE, and clamp the voltage below our abs max. The thing is that CBn-CBn-1 has lower abs max so some customer also consider to add TVS between each cell to clamp to voltage further below CBn-CBn-1 abs max to add addition robustness. Hope this helps.

Thank you Ted for you availability,

Please note that my concern is not about abs max voltages on BQs pins. I'm mostly warried about current paths through internal protections of BQs pins during hot-plug: for example it contacts only CELL14 and CELL0 contact pins so i have about 60V from CB14/VC14 and CB0/VC0 without contacting GNDs and BAT/power pins, it can last tens-houndreds milli seconds, during first inrush and that hot-plug time there happens that CB14/VC14 acts like positive rail through high rail protection and CB0/VC0 acts like negative rail through lower rail protection. Same thing with another combination of 2 pins. There could be a path through internal protections (and through external suggested RC filter) that can damage the internal protection? All that is based on my thought about internal rails protections, is it true? What kind of rail protections are there? Do those internal rail protections point to higher power rail or to an internal clamp? And lower rail protections are similar to a diode from GND to the pin?

This is why i'm talking about external schottkys from CELLx to BAT and from GND to CELLx, just to bypass the current flow from internal protections to external schottkys (i think lower drop).

This is a situation that i experienced with different ICs in hot-plug critical conditions.

What do you think about that?

PS. I'll certainly put a TVS at power contact, that's where i want my previous schottkys to point from evey CELLx so in case of spike at CELLx i can also clamp it to the TVS at Power pin.

Please tell me if i better explained my doubts and what do you suggest about that.

Thank you very much!

HI Fatjon,

If you see abs max range (-0.3, BAT+0.3) usually that says there is internal diode pointing to BAT, and your method might work. That's not the case for BQ79614, VC pin voltage can be higher than BAT as long as you keep the Pin voltage below abs max in the datasheet, then the device should be safe. 

Thank you Ted for replying,

Max voltage rating of those pins is referred to AVSS. In hot-plug we suppose as said before: contact of other pins (before AVSS, GNDs, ... and BAT) that could create current path from internal protections. Since Min voltage rating (referred to AVSS) si -0.3V, this means that it could be, as also you supposed in usual case, a diode pointing from AVSS to the pin. Can you confirm that?

The other missing information is the internal protection from the pin to the higher rail: is there any rail protection diode pointing to an external pin or to an internal (not exposed) clamping device which would clamp through AVSS? If there isn't such a "diode" and it's just a matter of max voltage, then there couldn't be any path from the higher cell pin to an internal rail and then to AVSS bye a lower cell pin protection diode through AVSS. Can you confirm that? In other words, could it happen a back powering from CBx/VCx of higher cells passing through an internal protection path when the voltage on the pin is below the max rating?

I repeat that i'm not worried about max voltage to any pin and AVSS/GNDs, but about undesired paths like: voltage below max rating (referred to AVSS) at an higher cell CB/VC pin -> internal protection of higher cell CB/VC to internal rails/paths -> internal reference protection for low rail of lower cells at CB/VC -> lower cell.

Please note that i don't want confidential informations, i just want to know if there could be any potential risk in long lasting hot-plugs (like the cases described above) and if the proposed solution can avoid those risks of damage.

Using schottkys (lower drops) that from any CBx/VCx pin points to a TVS (TVS placed from connector's bat pin and AVSS/GND) clamping below max rating looks like would prevent such a situation, but i'm not sure if it is really needed in such hot-plug situations (as describer above) or if it isn't enaugh because of a different internal path. Maybe it would be more useful the schottky from AVSS to any CELL connectors pin to avoid an internal path from lower cell pins acting as negative reference since then, with external schottky creating the lower drop path to the internal AVSS, there would be just a problem of max rating at the higher cell pins. What do you thing about that?

Thank you again for you patience!

Fatjon

Thank you very much for clearing up many of my doubts!

I implemented the design reccomendations as base protection and thed included the additional protection outside. I think we'll be protected enough but we certainly need to test and simulate the hot-plug scenarious to verify our robustness.

PS. What do you think about Ferrite beads immediatly after connector pins? Those perline beads have some DCR (about 0.1ohm) so can impact on measure during balancing. What's the best compromise: 1. Manage a balance stop and measure with the host mcu or 2. Avoid series components to avoid voltage drops during balancing & measure?

Thank you very much!

Fatjon

Thank you very much!