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TPS62148: Questions Related to SS/TR pin Operation

Darren (FAE)
Expert 5483 points
Part Number: TPS62148

Q1: The internal Vref is 0.7V (used for SS/TR) typical, right?

Q2: I understand SS/TR is connected to a Current Source, which is connected to a mid-rail that comes from VIN - yes?
I am being asked for a high-level visual description...the functional block diagram in the DS doesn't quite have enough info to help gauge what the cap might see.

Q3: Could the cap connected to SS/TR pin see a voltage as high as VIN?
This information is needed to select the voltage rating of the SS/TR capacitor - I need to know the max voltage this pin could see.

Q4: Will forcibly bringing SS/TR pin to 0V cause the PGOOD signal to go LOW?
For reference, pulling the EN signal "Low" pulls PGOOD "Low", even before the output voltage has fallen.
Would bringing SS/TR to 0V also do the same thing?

  • 0
    TI__Mastermind 21795 points

    Hi Darren,

    Q1: Yes internal reference is 0.7V

    Q2: Internally, this looks to be pulled up to 3V as per datasheet pg.16 so the SS/TR voltage should not exceed that. 

    Q3: SS/TR should be clamped to 3V as per datasheet pg.16 so that is what it should see. Max rating on SS/TR pin is VIN+0.3V.

    Q4: Let me see if I have a TPS62148 EVM I can measure this on and get back to you. I will also check the SS/TR voltage while doing this test.

    Thanks,

    Amod

  • 0 in reply to Amod Vaze
    TI__Expert 5483 points

    Hi Amod,

    I appreciate you taking a look at Q4 with the EVM.
    With the results, could you also provide an overview of how the 3V is generated?
    It would help the customer to have confidence on selecting the caps voltage rating.

    Since the ABS MAX says VIN + 0.3V, it also seems like SS/TR also has another clamp to VIN...

    Regards,
    Darren

  • 0 in reply to Darren (FAE)
    TI__Genius 13001 points

    Hi Darren!

    Amod will reply you soon!

    BSR-MV

    Shuai

  • 0 in reply to Darren (FAE)
    TI__Mastermind 21795 points

    Hi Darren,

    I confirmed on default EVM design that the final SS/TR voltage is ~2.2V which is below the internal 3V clamp. Under any case, since the value of the SS/TR cap is generally in the pF or nF range, the voltage ratings on those caps is quite high. Like the EVM is a 3.3nF/50V cap. And since the expected max SS/TR voltage is much lower than that, there should not be an issue. I have pinged the design team to see if they can find more about the internal details but that may take a while to retrieve. 

    I also confirmed that SS/TR forced to 0V does not cause the PG to go low immediately. But, as a result of SS/TR being pulled to 0V, the VOUT falls. And when it below the PG threshold that is when the PG goes low.

    Hope this helps.

    Thanks,

    Amod

  • 0 in reply to Amod Vaze
    TI__Mastermind 21795 points

    Hi Darren,

    Let me know if you have any more questions on this. I am waiting on feedback from design team but it could take longer.

    Thanks,

    Amod

  • 0 in reply to Amod Vaze
    TI__Mastermind 21795 points

    Hi Darren,

    I got some feedback from design team. They confirm that the SS/TR is clamped to 3V internally so it should not generate voltages as high as VIN. The max voltage of VIN+0.3V just means that the pin can be forced to handle voltages that high.

    Hope this helps. Let me know if any additional information is required. 

    Thanks,

    Amod