Hi Team,
On our TPS65033x datasheet we have the minimum voltage for Vio as 1.8V:
My customer is doing worst case analysis so needs confirmation that if a rail powering this is nominally 1.8V we can still meet device requirements if the rail powering this has 5% tolerance (minimum voltage of 1.71V).
Thanks for the help,
David
Hi David,
The datasheet is specifying the minimum standard logic level. It’s acceptable to have variance as most customers do use the Buck 2/3 output to supply this pin.
The main consideration with this variance is the compatibility of components connected to the TPS65033x IO pins, which are supplied by VIO (the nRSTOUT, nINT, and GPIO pins). For example, with a VIO of 1.8 V, the minimum VOH of nRSTOUT is 0.7*VIO. As such, the input pin of the downstream component should have an equal or higher VIH.
VIH >= 0.7*1.71 = 1.197 V.
Thanks,
Gerard
