TPS7A10EVM-004: Question about Bias Voltage and Current limiting

Hi Jerome,

As long as VBIAS is outside of the range of dropout, specs don't really change with a changing VBIAS. The change in accuracy is another form of line regulation and that is about the extent of the effects of VBIAS on the specs.

I'm not sure exactly what is going on at the input because it looks like the supply starts dipping before the LDO does anything. In general, when there is a large current drawn from the supply it can dip if the supply has a large source impedance. Do you have a lower source impedance supply you can use to run this test again?

Can you also please explain the details of this test? You said that the output current is set to 410mA; it looks like there is ~410mA load current at the far left of the scope shots, so what changes to create this behavior? Do you increase the current demand from the load to create the overcurrent condition?

Thanks,

Nick

Hello Nick,

Thank you for the response about VBIAS.

As for overcurrent test, this was the procedure:

1. Apply 5V to VBIAS

2. Apply 1.1V to Vin

3. In CC mode, apply 300mA to the output with an E-load

4. Slowly ramp up the output current in increments of 10mA

The scope shots describe the scenario between going from 400mA to 410mA E-load current.

Hi Jerome,

The CC mode may be the issue here. We have seen a lot of issues in the past when customers use CC mode on their supplies because the control loop can interfere with the LDO control loop, especially when a condition like overcurrent is created. Can you try the test by setting it to CR mode with a resistance that is appropriate to generate the 410mA load?

Thanks,

Nick

Hi Nick,

I was able to test with CR mode and it was operating more or less what I was expecting. One thing I saw that I cannot explain for myself is that around a load CR of 1.4 ohms, the LDO enters something like a hiccup mode where it turns off and on repeatedly:

CH1: VIN, CH2: IOUT, CH3: VOUT

Recall that I am operating with Vin=1.1V, Vout=0.8V, Vbias = 5V. So it is hard for me to believe that this is thermal shutdown operation with such a low V drop.

I don't think it is Vin or Ven UVLO either as Vin and Ven are tied together and CH1 of the scope shot shows a minimum value of 0.9V. I didn't measure Vbias so I can't completely rule out Vbias UVLO.

Any thoughts to what might be happening?

Hi Jerome,

I'm not sure I understand this plot. Using the CR mode I would expect the output current to have the same form as the output voltage but it looks very different. It looks like there is ~220mA output current while the output sits at near 0V. Can you show me where the output current is measured?

I agree that the device is probably not entering thermal shutdown.

Regards,

Nick

Hopefully this is helpful.

Hi Jerome,

Can you try using a purely resistive load, i.e. a resistor? I don't know why the load current profile looks the way it does so I wonder if the current source is causing problems.

Thanks,

Nick

Hello NIck,

It seems that I had the power supply at a current limit of 500mA, which explained the weird behavior earlier. Here is a new scope shot in CC mode, triggering the overcurrent limit on the LDO:

CH1: VIN, CH2: IIN, CH3: VOUT

Hi Jerome,

That looks a lot better. Have you resolved all of your issues? Are you still seeing the part periodically shut down?

Regards,

Nick

I am still seing the part periodical shut down when I use CR mode on the E-load. This CC mode test to verify the current limiting of the device is sufficient for now, but I am curious about why CR mode trigerrs that weird behavior.

Hi Jerome,

Can you share a new scope shot of this shutdown behavior? I wonder if the current profile looks more like the output voltage profile now that one of the issues is resolved. 

Thanks,

Nick

So the shutdown behavior triggers at around 1.3ohms, and as I decrease the resistance, the duty cycle of the peaks and its frequency decreases:

CH1: VIN, CH2: IOUT, CH3: VOUT

1.3 Ohm Resistance E-load

0.2 Ohm Resistance E-load

The frequency went from 1.45kHz at 1.3 ohms, to 317.5 Hz at 0.2 ohms.

Hi Jerome,

That still looks very weird to me. Did you try with a resistor as the load? 

Regards,

Nick

I've tried with a resistor and it worked as expected. So it might just be the E-load control loop doing something weird that interferes with the LDO.

Hi Nick,

Going back to this issue. Is it possible that someone can try and replicate this issue? We want to make sure that this issue is fully closed before moving forward with this chip.

Our setup is using a TPS7A10EVM-004 with a TPS7A1008 soldered on. Configuration details and diagrams are further up this thread. 

I do have access to a different e-load, so I will probably try using that as well in the meantime just to see if this issue is consistent.

Hi Jerome,

I will attempt to replicate this issue. I am a bit backlogged on bench tests so please allow me 3-5 business days to get to this. 

Thanks,

Nick

Thanks for taking the time to replicate this! I just wanted to make sure this wasn't just happening to us.