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TPS62420: Switching Node (SW1, SW2) Transient Voltage Rating

Part Number: TPS62420
Other Parts Discussed in Thread: TLV62080

Hi,

we are currently using TPS62420 in one of our designs as a supply for the F28388D and some other peripherals. More precisely, we are generating 3V3 with converter #1  and 1V2 with converter #2 from a 5V input voltage. As is the case for every switching regulator, a small amount of overshoot on the switching nodes SW1 and SW2 is unavoidable, even in a sophisticated layout. First performance measurements on our actual PCB have shown a small 130 MHz ringing on the SW1 and SW2 nodes with a maximum overshoot of approx. 6.7V at an input voltage of 5V. The ringing deceases pretty fast (gone after 2 rings).

Now, according to the TPS62420 datasheet, the absolute maximum rating on the SW1 and SW2 nodes is 7V, which I assume would be the case for DC. Since I'm not sure if we can keep the overshoot below 7V under all circumstances, I was wondering if there is an additional transient voltage rating for SW1 and SW2 as is the case for other low-voltage buck converters from TI? For example, in the datasheet of the TLV62080, a transient voltage of 10V for less than 10ns is mentioned. Is there a similar rating for the TPS62420 or do we have to start experimenting with RC-Snubbers in order to further reduce the overshoot? Of course, we would like to avoid the latter.

Thanks in advance.

Best regards,

Sebastian

  • Hi Sebastian,

    Unfortunately, we do not have any additional transient voltage rating for the SW node.

    In my opinion, the absolute maximum ratings mentioned in the datasheet are stress ratings. I do not see any problem with the values you are getting during normal operation of the converter. I would also recommend to check following app note : https://www.ti.com/lit/pdf/slva494 to get a better understanding about the ABS maximum rating of the SW node during normal operation.

    In addition to this, please note that the ringing also depends on the PCB design and probing technique used for SW node voltage measurement. Make sure that the GND of the probe is as close as possible to the IC during the measurement.

    Let me know if you have additional questions.

    Thank you!

    Best regards

    Sneha

  • Hi Sneha,

    first of all, thank you for the link to the app-note. This basically confirms my understanding of the absolute maximum ratings section. The only thing that is still unclear to me is the 7V max. rating on the SW nodes for the TPS62420. Since the part uses a PMOS FET as a high-side switch, I assume there is also a a parasitic body diode from SW to VIN. Consequently, the max. voltage rating on SW should be VIN + 0.3V, as mentioned in the app-note. Where does this fixed 7V value come from? Is it the breakdown voltage of the low-side FET?

    As you mentioned correctly, PCB design and probing technique have a big impact on switch node overshoot. Since we are doing lots of SMPS designs, I dare to say that our layout is in line with "good design practice" and that probing was done via a "low-inductance" probe as is described in the app-note.

    Now that I had some time to do some more investigations and measurements, I want to share my insights with you. Below you can see some measurements regarding the switching node SW1 at light (<50mA) and medium load (approx. 330mA). You can see a slight overshoot and ringing at 455MHz during high-side turn-on. Interestingly, the overshoot decreases with increasing load current. It should also be mentioned that the TPS62420 is configured to operate in PWM-mode only, since we do not have a battery powered application.

    By the way, the behavior is almost identical between SW1 and SW2. Therefore, my subsequent explanations will only be referred to converter #1.

    Voltage on SW1 at light load:

    Voltage on SW1 at medium load

    Since we prepared pads for an optional RC-snubber between SW and GND in our design, I used the opportunity to carry out some further measurements and calculations.

    I calculated the parasitic elements responsible for the 455MHz ring to be in the range of Lp=3.8nH and Cp=38pF. Then I inserted the RC-snubber with Csn=100pF and Rsn=10R, which already provided reasonable damping.

    Voltage on SW1 at medium load and with RC-snubber (100pF, 10R) populated

    The additional losses due to the snubber are minimal (<10mW). The only potential issue I could think of when using a snubber, are the additional peak currents introduced during turn-on and turn-off, which could lead to premature termination of the PWM cycle due to the internal current limit of the TPS62420. I mean these peaks are very short (~1ns) and I assume the TPS62420 has some kind of blanking time immediately after turn-on in order to prevent such unintentional PWM cycle terminations?

    This picture shows the voltage drop across the 10R snubber resistor. The current peaks are about 300mA high and 1-2ns long. 

     

    So, I really thinks this thread might have gotten a little out of hand. Anyway, Im curious about your opinion on this topic.

    Best regards,

    Sebastian

  • Hi Sebastian,

    Please let me give you a feedback by early next week. 

    Thank you!

    Best regards

    Sneha

  • Hi Sebastian,

    The abs max rating for the SW node is coming from the input voltage ratings. I suppose, as the SW node can be stressed up to input voltage ratings. So, max rating of 7V is coming from there. 

    Regarding the RC snubber for minimizing the ringing, I would suggest to look into this app note for more information on it. https://www.ti.com/lit/an/slva255/slva255.pdf?ts=1646642552055 . Just as a side note, I do not see any problem in using the RC snubber as long as the efficiency is within your desirable limits.

    However, your second question is not very clear, could you please elaborate further?

    Thank you!

    Best regards

    Sneha  

  • Hi Sneha,

    thanks for the info.

    Well, let my try to illustrate my question about unintended early PWM cycle termination. Since I cannot measure converter currents in a meaningful way and thus I do not have any waveforms available, I will try to explain by the means of simulation waveforms.

    The following figure shows the idealized waveform of the high-side switch current in the buck converter (duty cycle is around 70%)

    Now, if one adds an RC-Snubber, the additional current needed to charge up the snubber capacitor will also be "seen" by the high-side switch during turn-on. Consequently the current waveform will change to something like this (10R / 100pF example shown):

    Now, my question regarding the TPS62420 is as follows. Could this initial current peak trigger the TPS62420's internal current limit and thus lead to unintended early PWM cycle termination? Usually, within switching regulator ICs some kind of leading edge blanking or a similar technique is implemented to "ignore" these peaks during or immediately after the switching event. Since nothing of sort is mentioned in the TPS62420's datasheet, I wasn't really sure if this could be an issue.

    Up to now we haven't experienced any issues with the PS62420 buck converter in combination with the snubber - but we just want to rule out potential future problems.

    Best regards,

    Sebastian

  • Hi Sebastian,

    Okay. Understood. I will have to check this internally with the team and would give you a feedback by tomorrow.

    Thank you!

    Best regards

    Sneha 

  • Hi Sebastian,

    I do not see any issue with those peaks as the PWM operation is not using a peak current detect control, instead using a voltage mode controller scheme.

                                  

    Thank you!

    Best regards

    Sneha

  • Hi Sneha,

    yes, that's true - switch current is obviously not used for regulation purposes. My concern with peak currents was rather related to the device's short-circuit protection as described in section 8.3.8. 

    Best regards,

    Sebastian

  • Hi Sebastian,

    Okay. Sorry, I misinterpreted your question. 

    In case of short-circuit protection, it looks like there is sufficient margin for the maximum current limit even during operating in full-load condition. So, that would not cause any potential issues during normal operation. 

    Thank you!

    Best regards

    Sneha

  • Hi Sebastian,

    Do you have further questions related to this thread? Please let me know.

    Thank you!

    Best regards

    Sneha 

  • Hi Sneha,

    I guess I'm good for now. Thank you for your efforts.

    Best regards,

    Sebastian

  • Hi Sebastian,

    Thanks for the update. I will close this thread now. If you have further questions, please feel free to re-open it after posting your comments here.

    Best regards

    Sneha