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TPS562207: Why is D-CAP family able to generate output voltage under 7V?

Hideki Hayashi1
Expert 6010 points
Part Number: TPS562207

Hi team,

Most of our DCDC with DCAP control are able to generate <7V. Do you have any documents or resources which explain about the limitation of output voltage?

Best regards,

Hideki

  • +1
    TI__Expert 7430 points

    Hi Hideki

    The basic rule is that we sampling the SW voltage within the IC and after SW being filtered (get the average value which is equal to Vout), the signal is sent to a comparator which is feed by Vcc. The internal Vcc is limited causing Vout is limited. We do not have an app note for that, sorry about that.

    Hope this helps.

    BR

    Ruby

  • 0 in reply to Ruby Li
    TI__Expert 6010 points

    Hi Ruby,

    If I understand correctly, that is a explanation which can be adapt to all DCDC converter. But if we talked about DCDC converters with other control mode such as VM, CM , maximum voltage of those is limited by maximum duty. Customer would like to know the reason in order to use it for around 7V rail?

    Best regards,

    Hideki

  • +1 in reply to Hideki Hayashi1
    TI__Expert 7430 points

    Hi Hideki

    Actually, it is adapted to DCAP, since different control mode uses different control topology. For PCM, the SW is not sensed to sent to the comparator, so Vcc won't limit Vout.

    For all converters, Vout is limited by Vin, and maximum duty cycle and control loop. 

    Hope this helps. 

    BR

    Ruby

  • 0 in reply to Ruby Li
    TI__Expert 6010 points

    Hi Ruby,

    I could notice I was misunderstanding.  I will post again if I have additional question.

    Best regards,

    Hideki