The customer design with BQ25505, they set Vbat_ OV is 4.5V, Vbat_ OK_ HYST is 4.2V, but it is found that the super capacitor can be charged to 4.5V, while Vbat_ OK is always low.
Attached the schematic for your reference.
They use the DC input to charge the super capacitor, and disable MMPT and sampling.
The super capacitor can be charged but VBAT_OK keep low.
Please give some suggestions about this query.