Hi
Datasheet mentions thermal shut down could be tripped when Tj_FET - Tj_ctrl > T_REL, where can I find the T_REL value?
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Hi
Datasheet mentions thermal shut down could be tripped when Tj_FET - Tj_ctrl > T_REL, where can I find the T_REL value?
Hi Qi,
It would be 60 degC typical.
Regards,
Yichi
Hi Yichi
Thanks for the quick reply!
We are using TPS1HB16A-Q1 to switch ON/FF a 12V load with quite a few input capacitance (~2000uF) which results in a long period of inrush (I_limit=6A, 5ms).
If we trip the thermal protection every time we switch on the load (serval times per day), would that be of any reliability concern?
Regards,
Qi
Hi Qi,
Thermal shutdown is designed to protect the device and does not affect device's reliability.
Regards,
Yichi