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LM7481-Q1: Ideal diode can't turn off in two PSU OR-ing application

Andy Liao
Prodigy 20 points
Part Number: LM7481-Q1

Hi Sir,

Datasheet shows V(A)-V(C) Threshold for fast reverse current blocking is typ. -4mV, does it mean the ideal diode mosfet turns off in condition that 2A reveres current flow through mosfet (Rdson 2mohm). If my understanding is correct, does below scenario happen possibly?

Use two LM74810-Q1 for the dual PSU input in OR-ing connection and PSU has no sink current capability, . Is there possibility that ideal diode can't turn off since the reverse current is quite low? Another case, if one of PSU is disconnect suddenly, the ideal diode will not turn off since there is no reverse current flow (Input becomes high-impedance)?

We'd like to know the behavior of LM74810-Q1 base on our experience of other supplier's solution.

  • 0
    TI__Guru 57737 points

    Hi Andy,

    LM74810-Q1 has linear regulation + comparator based gate control scheme for blocking reverse current. The linear gate control ensures zero reverse current flow for slower variations in input/output voltage.

    For faster/transient variations (which are faster than the linear regulation  control loop bandwidth), there will be some reverse current flow before the controller detects and turns OFF the FET.

    The amount of reverse current required in this condition is = FET RDS(ON) / VSD(REV)

    *For more understanding on Linear regulation scheme, please refer to

  • 0 in reply to Praveen GD
    Prodigy 20 points

    Hi sir,

    Thanks for your reply.

    I did the test on the LM74810 dual input OR-ing circuit.

    VBATT1 is 12V, VBATT2 is 10~14 voltage step. When VBATT2 = 14V, Q2 Dgate rises from 14 to 18V and Q1 Dgate falls from 16 to 12V. Suppose Q1 is completely off, but we still see about 180mA reverse current flowing back to VBATT1. Why is the reverse current not blocked to zero? Thanks.

  • +1 in reply to Andy Liao
    TI__Guru 57737 points

    Hi Andy,

    When VBATT2 rises above VBATT1 , the DGATE1 and A1 of are internally shorted. This makes the voltage of  Q1 FET Gate-Source = 0V making it completely OFF. As the Q1 FET is completely OFF, you shouldn't see current more than Iq (~413uA) flowing out of VBATT1. 

    The 187mA that you are referring to is actually -187mA which is the minimum value of Ch4 on the Oscilloscope screen. -187mA is the reverse current flowing from OUT into VBATT1 (when VBATT2 rises above VBATT1) before the LM74810-Q1 turns OFF the gate of Q1 completely.