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LMZ31506: Power Good output delay

Satoshi
Guru 19595 points
Part Number: LMZ31506

When LMZ31506 startup, power good output is delayed about 6ms.  

Please refer below waveform;

※ch1: Vin (5V), ch2: Vout (1.03V), ch3: PWRGD

Is there any reason for PWRGD delay?

If there detailed schematic, please let me e-mail address.

By the way, pullup resister is 10kΩ, but also output side (the other IC's enable) connect 1MΩ pullup.

Is 1MΩ possibility to involve the PWRGD delay?

Best regards,

Satoshi

  • +1
    TI__Expert 3845 points

    Hello Satoshi,

    If you do not mind you can send me the schematic to my email address (s-gradinaru@ti.com) and I will take a look at it. I am not entirely sure what you mean with your second question so the schematic would be very useful for me to understand your question.

    "Is there any reason for PWRGD delay?"

    There could be several things that might be contributing to this delay. Some of these can be seen in section 9.9 of the datasheet. However I suspect it might be related to the SS capacitor in your design.

    What Css value do you have in your design?

    "By the way, pullup resister is 10kΩ, but also output side (the other IC's enable) connect 1MΩ pullup.

    Is 1MΩ possibility to involve the PWRGD delay?"

    Are you saying that you have this in a sequence orientation and the PWRGD is enabling another LMZ31506 or this is enabling a different IC?

    Best Regards,

    Samuel Gradinaru