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TPS7A7300: Two power rails with start-up delay

Part Number: TPS7A7300

Hi,

Good day.

Our customer has this inquiry about the TPS7A7300:

We are using the TPS7A7300 LDO. The "IN" pin is receiving power from a 1.8V rail, and the "PG" pin is connected to a 3.3V rail with a pull-up resistor. The 1.8V rail has a start-up time of about 1ms while the 3.3V rail has a start up time of about 20ms-40ms. Will there be any issues with the LDO given the delay between the two power rails coming up is about 20ms-40ms? 

Thank you for your help.


Regards,

Cedrick

  • Hi Cedrick,

    The LDO does not care what the status of the 3.3V rail is, so its performance will not be affected. However, the PG signal will incorrectly indicate that the 1.8V rail is not at its target until the 3.3V rail comes up to a valid logic level, so if there is a μC that is monitoring PG, there will not be a good way to indicate the status of the 1.8V rail during startup. If this is not a concern in their system then this is not an issue from the perspective of the LDO.

    Regards,

    Nick

  • Hi Nick,

    Thank you.

    Additional inquiry, are there any limitations on how quickly the voltage can rise up from the 1.8V rail. The estimated ramp up rate is 300-900 microseconds as opposed to the 1ms that I originally stated for the 1.8V rail.

    Regards,

    Cedrick

  • Hi Cedrick,

    This startup time is fine. The limitation for VIN ramp rate for an LDO is usually for it being too slow and not too fast; if it is too slow such that the LDO output catches up to the input and starts up in dropout, the device output can overshoot. If the VIN ramp rate is faster there is no effect.

    Regards,

    Nick

  • Hi Cedrick,

    Just to be clear, I was referencing Figures 36 and 38 when I said that this VIN ramp rate is fine. 

    Regards,

    Nick