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UCC21732-Q1: Gate Driver selection

Part Number: UCC21732-Q1
Other Parts Discussed in Thread: UCC21732, UCC21750

This is in reference to the gate driver controller IC UCC21732 .

 In case of short circuit or over current protection the IC has a modern approach, where an OC pin is available which can be configured to detect adverse SC situations. However, this functionality can’t be used with selected SiC MOSFET because of unavailability of SenseFET provision in MOSFET. The other options left are DESAT and shunt resistor method.

 In case of shunt resistor, there are obvious limitations of high power loss, low noise tolerance, parasitic inductance and non-galvanic isolation. So, with this constraints the only available option is DESAT protection. But, with the selected controller IC (UCC21732) the configuration is not straight forward, as the current source to charge the CBLK is not from the IC, an external source has to be configured.

 The below image gives a glimpse on the DESAT configuration. It would be nice if you can provide your insight for the calculation of various resistor as the usage of the gate driver and overcurrent protection is very crucial for our application.

On other hand, the selected controller family has other IC (UCC21750) which has dedicated DESAT configuration. But, the there will be tradeoff between 2-level turn-off and soft turn-off functionality.

So, which part number should be selected to provide DESAT protection owing to the advantage of 2-level turn-off in the other.

Also, Calculations are performed for the normal DESAT configuration for UCC21750. However, the internal reference voltage is 9 V for the trip and the VDS at which short circuit takes place is 1.5 V. So, the voltage threshold can only be set by taking RDESAT of higher value and at least 4 diode is series. Is this a viable approach? Also, the blanking time is 1.8 us. Is this tBLK more for SiC protection?

Kindly provide insights on the above points.

  • Hi Ravi, 

    To use the OC pin as a DESAT pin with the configuration you provided, you can calculate the resistor values based on the desired Vce detection threshold. 

    During normal operation, V1 = Vce + Vdhv + Vz, and Voc = V1 *R2/(R1+R2). Voc should be lower than 0.7V. 

    During short circuit events, the current charges Cblk, which results in Voc rising above the 0.7V threshold. The time it takes the capacitor to charge would equal to -(R1+R2)/(R1+R2+R3) * R3 * Cblk * ln(1 - (R1+R2+R3)/R3 * Voc/VDD)

    Therefore, the OC pin can also act as DESAT. If you choose to go with this approach and want to use two-level turn-off I suggest to go with UCC21732. 

    So, the voltage threshold can only be set by taking RDESAT of higher value and at least 4 diode is series. Is this a viable approach?

    If you want to make larger adjustments to the desat threshold, you can consider using a zener diode (as shown in my picture above) instead of using multiple diodes in series. Either approach will work. 

    Also, the blanking time is 1.8 us. Is this tBLK more for SiC protection?

    The blanking time is the time used to charge the capacitor up to the DESAT threshold. It will provide some noise immunity, however too long of a blanking time is not good for SiC MOSFETs since it essentially means the duration between the short circuit event and the soft turn-off or two-level turn-off is longer. You can also increase the DESAT charging current to decrease the blanking time; see this post below for more details. 

    e2e.ti.com/.../faq-ucc21750-how-can-we-increase-desat-charging-current-for-faster-short-circuit-detection-time-in-ucc217xx-and-iso5x5x

    Hope this helps!

    Thanks, 

    Vivian

  • Hi Vivian,

    1. The equation for Voc = V1*R2/(R1+R2) should be Voc = V1*R3/(R2+R3) right?

    2. Besides what is provided in the link for calculation of blanking time when using DESAT in UCC21750 (eq. 8), the charging current used fot tBLK equation is internal right? Because there might be some change in consideration of ICHG. Kindly clarify which current to be calculated? ICHG (internal source current) or ICHG2 (external source current).

    link: [FAQ] UCC21750: How can we Increase DESAT Charging current for faster Short-circuit detection time in UCC217xx and ISO5x5x? - Power management forum - Power management - TI E2E support forums

  • Hi Ravi, 

    The equation for Voc = V1*R2/(R1+R2) should be Voc = V1*R3/(R2+R3) right?

    Yes, you're right. Apologize for the typo, I was looking at another diagram when writing this equation out. 

    ICHG (internal source current) or ICHG2 (external source current).

    In equation 8, Ichg (the internal charge current) value is used, which is 500uA for UCC21732. Thanks! 

    Best, 

    Vivian

  • Hi Vivian,

    Above equations gave me clarifications. However, in order to set R1 there needs to be some reference. Because the current which the circuit will consume from VDD will not be constant as it is a constant voltage source. And we can have a relationship between R2 and R3 with the above given equations. But, in order to be sure with the resistor value, is there any reference to accurately calculate R1?

    And we have to calculate all the resistor and blanking time values considering the sc conditions. For e.g. if fault occurs at VDS = 5V, we have to use the same value to calculate Voc and rest of the constants?

  • Hi Ravi, 

    is there any reference to accurately calculate R1

    We recommend an R1 of several kOhms. 

    Also, the resistor values and diodes are selected to determine the Vds threshold. Once the threshold is determined, the blanking time will just be dependent on the resistor values, capacitor values, VDD, and Voc. In this case, Voc will just be the OC detection threshold, which is 0.7V. Once the capacitor gets charged above 0.7V, OC will trigger after an internal deglitch period, which is typically 120ns. 

    Hope this answers your question!

    Thanks, 

    Vivian