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TPS40305: Low side MOS broken

Part Number: TPS40305
Other Parts Discussed in Thread: CSD17507Q5A, , TPS40304, CSD17501Q5A, CSD17506Q5A

Hi,

We have designed a circuit around the TPS40305DRCR.

Vin = 9V to 16V. Vin is connected to an external battery.

Vout = 5V/8A.

The MOS are CSD17507Q5A.

/resized-image/__size/320x240/__key/communityserver-discussions-components-files/196/P5V.jpg

At power up, there is no high load on the P5V supply (except capacitors).

We have two boards where the low side MOS is broken (short circuit state) just after the power up. No load has been added on the P5V. The current consumption is normally less than 2A.  

Could you analyse our schematic to find what is wrong?

The CSD17507Q5A is died in short circuit. Is it due to an over current or an over voltage?

CSD17507Q5A is not a good choice for this application?

BR

 

  •  

    Unfortunately the image you linked to the file is too small to read any of the values.  

    One common cause of low-side FET damage in switch mode synchronous BUCK converters is over-voltage stress on the low-side FET due to switch node ringing.  The source inductance from the input voltage capacitors couples with the parasitic capacitance of the switching node to create a high frequency low damping factor L-C resonant tank, which causes the switching node to ring at very high frequency, generally above 50MHz.

    The ringing can cause a high Drain-source voltage on the low-side FET and induce off-time Drain-Source avalanche current, which can eventually cause the MOSFET to fail.

    It would help if you could take a high resolution (less than 50ns/division) voltage measurement across the Drain and Source of the low-side MOSFET so we can evaluate the MOSFET voltage stress.  If you can also monitor LDRV and HDRV at the same time as you monitor SW, the three voltages together would be very useful.

  • Hi

    Here is a new measure during power on.

    /cfs-file/__key/communityserver-discussions-components-files/196/mise-sous-tension4.pdf

    Channel 1: HDRV

    Channel 2 : SW

    Maths gives differential voltage from HDRV to SW.

    We  can observe pulse greater than 7V and 7V is the max value according to TPS4030x $6.1.

    Could these pulses break the TPS40305?

  • @Giles Lopez 

    While it is possible that a voltage greater than 7V on the HDRV to SW node could damage the HDRV driver devices, it is unlikely that would result in damage to the low-side FET.  It is also unlikely that the very short duration ringing observed in the waveforms would damage the drivers,  Based on the ringing, it could also be uncompensated skew in the two oscilloscope probes creating the appearance of higher differential voltage.

    I am more concerned about the 20.5V on the Drain-Source of the lowside FET in your VDS_5F00_T301_5F00_HDRV_5F00_LDRV.pdf image, which appears to be under a no or very light load condition with the switch node rising when the low-side FET turns off and high-side FET turns on, indicating negative inductor current.  The FETs themselves should be able to tolerate more than 20V though.

    When I review the compensation, it looks like the loop may be marginally stable with a cross-over frequency that is very close to the resonance of the output capacitors and depends heavily on the ESR of the 150μF electrolytic capacitor.  If there is an oscillation in the output, that could significantly affect the inductor current and the switch node stresses.

    1067.TPS40K TPS5 Type III Loop Stability kVenable.xlsm

    Raising R3 (R304 in your schematic) to 12k instead of 1.5k increases loop bandwidth and provides more phase margin.  If the issue is loop stability driving high current and ringing in the switching node, that will likely help.

  • Hi

    I replaced R3 as you proposed

    Here is the result.

    /cfs-file/__key/communityserver-discussions-components-files/196/Carte_5F00_CEM_5F00_SW_5F00_R304_5F00_12k.pdf

    I don't see a différence.

    I try by myself to find the issue.

    I connected a dc electonic load set to 1A on the P5V.

    I observed that the ringing depends on the current.

    But when I powered up the board with the electronic load ON,  the TPS40305 is dead!!!

    Both MOSFETs seem OK.

    The LDRV signal is OK, the BP voltage is OK  but the HDRV is incorrect

    /cfs-file/__key/communityserver-discussions-components-files/196/Break_5F00_HDRV.pdf

    Here is the top and bttom of the board.

    Layer 2 is a GND plane.

    /cfs-file/__key/communityserver-discussions-components-files/196/top_5F00_bottom.pdf

  • It looks like the HDRV voltage is not rising as it should.  HDRV is pulled up to BOOT, which should be powered from BP through an internal diode.  Check the voltage on BOOT and your C306 capacitor to make sure BOOT is powered from BP and the C306 capacitor is allowing BOOT to rise with SW as the high-side FET turns on.

    Changing R3 would likely not change the performance of a single switching cycle, but could change the performance of the part over several switching cycles by improving the stability of the output voltage, especially during start-up when the low phase margin at resonance could induce oscillations due to the changing output voltage.

    For the original issue resulting in damage to the low-side FET:

    Can you take on oscilloscope waveform of EN/SS and VOUT during the start-up with the time-scale set so that the full rise from 0V to 5V covers at least 50% of the horizontal scale of the oscilloscope?  I am looking for either oscillations in the rising output voltage or overshoot and recovery at the end of soft-start.

  • Hi

    I increased Cboot from 100nF to 200nF.

    I powered the board to see if ringings decrease but  5V supply did not work.

    There was a short circuit between P5V and GND.

    After investigation (low-mosfet then TPS40305 then L300 unmounted) ,  the short circuit was on a P5V side and

    it was due to a dc/dC TPS62827DMQR. For this part max vin is 5.5V. 

    Was it a big mistake to change Cboot to 100nF to 200nF?

    As the TPS62827DMQR was broken, it means that the P5V voltage was greater than 5V.

  • Changing Cboot from 100nF to 200nF should not have caused the output voltage to exceed 5.5V unless there is another issue.

    Instability in the output voltage, leakage in the FB divider from VOUT to FB, or damage to the control of the high-side FET could result in excessive voltage on the output, but those should not be caused by increasing Cboot.

    At this point, I would recommend replacing the TPS40304 controller and both MOSFETs to ensure that you do not have any other damage in the system that could be introducing new issue or problems.  Also, carefully review soldering joins and remove any flux or other contamination from the board to avoid leakage and shorts.

  • Components are on order. I'll be back when the boards are fixed.

    Note the TPS is TPS40305 and not TPS40304 

  • Concerning the first board, (with HDRV KO),

    I check

    - C306 => 100nF OK

    - voltage on BOOT = 1.5V

    - Voltage on BP =6.5V

    Could we suppose that the internal diode is broken?

  •   

    Yes, that would indicate that the BP to BOOT diode is likely damaged so BOOT is no longer charging, which prevents the high-side FET from turning on.

    The schematic does not have locations for a series resistor between the BOOT and Capacitor or SW node to control the high-side gate drive current and switch node ringing.  If it's possible to add one for testing purposes, adding a 2.2Ω resistor between BOOT and Cboot can reduce the rise time and improve switch node ringing without affecting the adaptive gate drive's monitoring of the high-side FET gate voltage.

  • I have two boards but they are now broken. I will replace broken components when I receive them. Then boards will be repaired.

    I m looking around the MOSFETS. Is CSD17507Q5A a good choice? Is there another possible refrerene which could be slower? . 

  •  

    The CSD17507Q5A is a 30V Vds rated MOSFET with a 20V rated gate-source voltage.  That should provide good margin against voltage stress.  It has very low gate charge with Qg of 2.8nC @ 4.5V, so the switching will be very fast with the TPS40305's 6.5V @ 1.5Ω drivers.  Selecting a lower Rdson / higher gate charge MOSFET would slow down the rising edge at the sacrifice of some efficiency.

    For example, the CSD17506Q5A is the same package and voltage ratings as the 507Q5A, but 1/3 the Rdson and 4x the gate charge, which will help slow the MOSFET switching down.  Pushing even further, the CSD17501Q5A has about 1/5 the Rdson and about 5x the gate charge, though I would recommend a boot-strap resistor rather than increasing the MOSFET size as a general solution.

    Layout of the lower stage, especially the LDRV to gate, and source to GND of the TPS40305 and the Drain of the high-side FET to the source of the low-side FET bypassing are also key to limiting ringing energy and low-side FET stress.  If the LDRV to gate, and source to GND path is long or high inductance for some reason, the gate of the low-side FET could rise up as the switching node increases the Gate-Drain voltage of the low-side FET, inducing current into the gate and charging the gate-source voltage.