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# [FAQ] UCC27614: Gate Driver Peak Current Considerations

Part Number: UCC27614
Other Parts Discussed in Thread: CSD19535KTT,

Does the gate driver self-limit output current?

The output current is limited by the output stage of the driver, FET internal resistance and any added gate resistors, as described by equation 1. The driver provides enough current limiting that using it without external gate resistance will not cause an output overcurrent under typical conditions.

Ipk = VDD / ( RDriver(int) + RGATE + RGFET(int) )

Equation 1: Gate Driver Peak Current

Why should output current be limited?

Peak output current may need to be limited in order to reduce power dissipation within the driver. Power dissipation from driving the FET is due to the current through the internal resistance of the driver. This power dissipation is proportional to peak current and can be estimated with equation 2 and can be reduced by using gate resistors. This equation gives driver power dissipation for a single output and must be doubled for a 2-output driver.

P = QG * fsw * RDriver(int) * Ipk

Equation 2: Gate Driver Power Dissipation

Why is peak current important?

Peak output current directly relates to how fast the driver is able to turn OFF/ON the power switch. This relation is shown by the rise and fall times of the driven power switches, which can be estimated by the following equation. This equation should only be used to give an estimate of how various factors affect the switching time. VQG is the voltage at which the gate charge is measured.

t = 2 * ( RDriver(int) + RGATE + RGFET(int) ) * Q/ VQG

Equation 3: Switching Time

Example

In this example we will look at the UCC27614 low-side driver with a CSD19535KTT FET with the following system and datasheet specs:

fsw = 100kHz
RGATE = 2Ω
VDD = 10V
QG = 75nC
VQG = 10V
RFET(int) = 1.4Ω
RDriver(int)on = 0.52Ω
RDriver(int)off = 0.34Ω

We can calculate the peak currents of this system using equation 1. First, we will estimate the peak source current. For peak source current, it is important to use the ac output resistance as described in the linked FAQ. https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1082569/faq-ucc27624-what-is-the-output-resistance-of-a-gate-driver

Ipk = VDD / ( RDriver(int) + RGATE + RGFET(int) ) = 10V / ( 0.52Ω + 2Ω + 1.4Ω ) = 2.55A

The peak sink current can be estimated similarly:

Ipk = VDD / ( RDriver(int) + RGATE + RGFET(int) ) = 10V / ( 0.34Ω + 2Ω + 1.4Ω ) = 2.67A

With these peak currents calculated, we can use the average peak current and internal driver resistance to estimate the power dissipation within the driver due to switching using equation 2.

P = QG * fsw * RDriver(int) * Ipk = 75nC * 100kHz * 1.42Ω * 2.61A = 27.8mW

Finally, we can look at the rise and fall times of the system. Using the specs above, the rise time of the FET gate can be estimated using equation 3.

t = 2 * ( RDriver(int) + RGATE + RGFET(int) ) * Q/ VQG = 2 * ( 0.52Ω + 2Ω + 1.4Ω ) * 75nC / 10V = 59ns

Similarly, the fall time of the FET gate can be estimated.

t = 2 * ( RDriver(int) + RGATE + RGFET(int) ) * Q/ VQG = 2 * ( 0.34Ω + 2Ω + 1.4Ω ) * 75nC / 10V = 56ns