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TPS62080: Power Good and Enable Sequencing

Part Number: TPS62080
Other Parts Discussed in Thread: TPS62824, TPS82084

Hello,

I would like to use the Power Good (PG) output pin on the TPS62080 to enable a second TPS62080 (or similar) supply. I'm planning to add the recommended pull up resistor from the PG pin to the output voltage (Vo). 

My concern is that based on the power good logic table in the TPS62080 datasheet (Table 1) the power good signal will be High Z when the device is not enabled. I have a delay between when the TPS62080 input voltage ramps up and when I enable the device. During this time the power good signal will be floating per table 1. If I have this power good signal connected to the enable on a second TPS62080 then this enable will now be floating as well. In the pin description of the TPS62080 its says to not leave the enable pin floating. I do not want the enable to be floating and potentially turn on the second device early. 

How do you recommend power sequencing with these converters to avoid this issue? Or is there a reason this is not a concern? 

Thanks. 

  • Hi Paul,

    Can you consider using TPS62824 or TPS62825 for your application? Here the PG signal is low impedance when EN is low and also when 0.7V < VIN < UVLO.

    It may be a better idea to connect the pull up resistor of the PG to VIN rather than VOUT, in case you have a fast VIN ramp down. With a fast VIN ramp down, the output voltage may not be discharged completely and the PG could show a wrong high.

    Best regards,

    Varun 

  • Hello,

    It looks like the parts you suggested are not readily available for purchase. We are actually designing out the TPS82084 due to availability problems and moving to the TPS62080 because it is available. It sounds like the TPS82084 has similar PG behavior to the TPS62824 you mentioned. 

    Do you have any ideas for implementing a similar PG low impedance when EN is low behavior on the TPS62080? Even if this would involve an external circuit. 

    Thanks. 

  • Hi Paul,

    You could consider adding a simple external logic with an AND gate as below. The output of the AND gate will be high only when both PG and EN are high. You could use it for sequencing the next device. The RC could be useful in case there is a short time where the PG still stays high when EN goes from low to high. The RC will give you a knob to eliminate this.

    In case there is a turn off sequence, you should also check if this circuit will work for the turn off.

    Best regards,

    Varun