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UCC2895: Not recovered after over current fault

GaryC
Intellectual 2985 points
Part Number: UCC2895

When the output is short-circuited (CH1), the waveforms of SS pin (CH1) and CS pin (CH2) are as follows, CS pin tops to nearly 2V and then returns to 0V. look at the SS pin from high to low but cannot recover. 
Want to know if there is any internal mechanism of the UCC2895 SS pin that causes the SS can't recover?

Note: I can make sure the REF pin still have 5V during the fail status. 

BR, Gary

  • 0
    TI__Guru* 76705 points

    Hello,

    Looking into this  issue and will get back to you shortly.

    Regards,

  • 0 in reply to Mike O'
    TI__Guru* 76705 points

    Hello,

    I can't see on your waveform which is CH1 and CH2.  I can figure out which is which.  However on future waveforms please label these traces.

    I reviewed the block diagram in the data sheet.  The soft start capacitor is charged with IRT.  Which 3V divided by RT.  If there is an over current fault >2.5 V the capacitor is discharged with  10*IRT and no longer charging. 

     

    When I look at your waveforms the SS pin seems to be pulled down to ground almost immediately.  Generally you size this capacitor for 5 to 10ms to prevent over shoot during startup,  based on I = C*dv/dt. 

    I don't see the SS reinitiating.  Does VREF drop below 4V during this test?  If it does you may just need to add more VREF capacitor to hold is up.  If VREF drops below 4V or the device enters UVLO the SS pin will be pulled down to ground.

    You may want to study VDD, REF, CS and SS during this test to see what is preventing the SS pin from charging after being discharged.

    Regards,

  • 0 in reply to Mike O'
    TI__Intellectual 2985 points

    Hi Mike,

    We check the REF pin still have 5V during the fail status, so the VCC is working normal. 

    The Yellow is SS pin voltage. The voltage from 5V drop to 0V.

    The Green is CS pin voltage. The voltage is ~ 1.9V peak at output short, and then drop to 0V.

    I know if the CS voltage >2.5V will run into disable mode, and reset fail by the DIS or SS drop < 0.5V.

    My question is that you can see below SS drop  < 0.5V after fail, but the IC don't reset fail state? 

    Please help to check reset condition whether the DIS and SS need to <0.5V at the same time, or one of them?

  • 0 in reply to GaryC
    TI__Guru* 76705 points

    Hello,

    When you run this test in your design something is preventing the SS from resetting.  I am wondering if VDD shuts off due to ULVO.

    Look at VDD, COMP, CS and SS when this occurs with an oscilloscope.   Trigger on SS when it goes low and look back at these pins just to make sure that they are behaving correctly.

    The SS should reset after the fault condition is cleared.

    Regards,

  • 0 in reply to Mike O'
    TI__Intellectual 2985 points

    Hi Mike,

    My question is that you can see the SS drop  < 0.5V after fail, but the IC don't reset fail state. Because we don't see the PWM recovery. I don't think this behavior is correct, and meet the spec.

    Please work with IC designer, adn help to check reset condition whether the DIS and SS need to <0.5V at the same time, or one of them? Thanks

    BR, Gary

  • 0 in reply to GaryC
    TI__Guru* 76705 points

    Hello Gary,

    There is something from keeping the device from resetting.  You are correct that when the SS drops below 500 mV it should reset. 

    What I was thinking is what ever event you put on the device may have caused the UCC2895s VDD to drop below UVLO of 9 V.  The device will not restart until VDD is over 11V.  

    Look at VDD, COMP, CS and SS when this occurs with an oscilloscope.   Trigger on SS when it goes low and look back at these pins just to make sure that they are behaving correctly.

    Regards,

    Mike