This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCD3138PSFBEVM-027: Disabling the Filter Compensation

Part Number: UCD3138PSFBEVM-027
Other Parts Discussed in Thread: UCD3138


If I would like to test the PSFB firmware with the PID compensation off, but everything else still intact, how would I go about this? 

I see where the filter is enabled and connected to DAC but maybe I’m missing something.



  • There are at least 3 ways to do this.:

    1. Use the DPWM with the CLA disconnected.  This is useful to just test the output transistor setup  and the rest of the power supply.  In this case, you just put the CLA in Normal mode with CLA disabled, and it will use just the period and Event 1-4 registers to drive it.  

    2. This mode and the next one are used to put the whole filter/DPWM circuit into open loop mode, which the filter driving the DPWM, but the filter is constrained in different ways.    There is an example of this technique in one of the canned labs for the UCD.  You load the PID coefficients with only a P coefficient.  All the other coefficients are zero.  Then you enable CPU_SAMPLE, where the filter uses a value loaded by firmware rather than the error signal from the front end as an input.  You can vary the CPU sample value, and the filter output will simply be the product of the CPU_SAMPLE value and the P coefficient, as well as the scaling for the filter output.  This makes it easy to vary the filter output to scan through the filter range.  It also is good for checking the connections between the filter output and the  DPWM.  

    3. This method is similar, but you just leave the filter running and connected to the front end, but you put the desired filter output into the filter output clamp registers, both high and low.  That way you can force the filter output to whatever filter value you want.  

    To do this in an EVM code, you have to go through and disable all the faults.  You need to look through the standard interrupt at all the power supply states, and see how the fault handling is done.  There are ADC values and other inputs that are checked at each state to decide whether to stay in that state or to go to the next state.  The state names are pretty obvious - you wont to go from idle state, through ramp up, and then into regulate.  So look at the code and comment any faults out that prevent progressing to the next state, and then comment out any faults that cause an exit from regulate state.  

    Of course with all the faults commented out, you need to make sure that your hardware is in good shape or that you are progressing slowly with current limit on your power source.  With out the faults, it's easy to blow things up if you have a hardware or firmware bug or you get too high an input voltage or too heavy a loaed.  

    There are also some comparator based hardware faults that you need to disable.  Some of them are enabled going from one state to another, although some are enabled in the initialization code.   Their initialization code is typically in something like init_fault_mux.  , or init_faults.  

    I suggest reading the UCD3138 Technical Reference Manual to understand what's going on, if you haven't already:

    The training videos are also helpful, and include the example I mentioned.  Here is a link to a post which includes training video information:

  • Thanks! That is all very helpful. Yes I did the trainings, and I have been reading through the technical reference. I am testing out the provided firmware, and have already tested it in open loop mode with the under voltage faults off.

    Now, I would like to test the module with the Faults on, using the EVM PSFB, but with the DPWM’s not affected by the filter output(unless there is a fault). As far as I can see, the CLA’s are disabled, and the DPWM’s are in normal mode, so I was just wondering how I could just disconnect the DPWM’s from the filter, as I may be missing something from the documentation/your explanation.



  • I forgot that in the PSFB, the filters drive the start value of the PCM ramp, not the DPWMs directly.  So I believe that if you disable the PCM mode and put DPWMs into CLA controlled mode, you can drive the waveform with the DPWM.  But the scaling will be wrong because it's aimed at the PCM ramp scaling.  

    So I'd strongly suggest working with the power off to the transistors and looking at the DPWM outputs.

    You will probably have to reconfigure the filter output to send it to the DPWM instead of the PCM ramp, and the scaling will be different.

    The filter section in the technical reference manual should show you the filter outputs.  You will also need to reconfigure the Front End to disable PCM, otherwise it may be trying to turn things off.  And the PCM goes through the fault mux via the over current/CLC line, so you will want to disable that somehere, including in the DPWMint registers.  

    Note that PSFB generally doesn't provide an overcurrent protection explicitly, since the peak current detection does the job automatically.  So if you want that you will need to add it back in.  

  • this has been sitting waiting for a while.  I'm going to assume that it is resolved.  If you have more questions, please start anotther thread and refer to this one if necessary.