Hi, all
What is the difference between LP875640RNFRQ1 and LP87564TRNFRQ1? It is not listed in LP8756x datasheet.
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Hi, all
What is the difference between LP875640RNFRQ1 and LP87564TRNFRQ1? It is not listed in LP8756x datasheet.
Hi Ken,
See the technical reference manuals https://www.ti.com/lit/pdf/snvu815 and https://www.ti.com/lit/pdf/snvu634
Here are the register differences between those two devices.
LP875640RNFRQ1 | LP87564TRNFRQ1 | |||||
Register address | Bitfield name | Value | Value description | Value | Value description | SAME? |
0x01 | OTP_ID | 0x16 | 0x16 | 0x89 | 0x89 | FALSE |
0x02 | BUCK0_FPWM | 0x00 | AUTO mode | 0x01 | Forced PWM | FALSE |
0x03 | SLEW_RATE0 | 0x04 | 3.8 mV/us | 0x05 | 1.9 mV/us | FALSE |
0x04 | BUCK1_FPWM | 0x00 | AUTO mode | 0x01 | Forced PWM | FALSE |
0x05 | SLEW_RATE1 | 0x04 | 3.8 mV/us | 0x05 | 1.9 mV/us | FALSE |
0x06 | EN_BUCK2 | 0x00 | DISABLED | 0x01 | ENABLED | FALSE |
0x06 | EN_PIN_CTRL2 | 0x00 | EN_BUCK2 bit | 0x01 | EN_BUCK1 bit AND ENx pin | FALSE |
0x06 | BUCK2_FPWM | 0x00 | AUTO mode | 0x01 | Forced PWM | FALSE |
0x07 | SLEW_RATE2 | 0x04 | 3.8 mV/us | 0x05 | 1.9 mV/us | FALSE |
0x08 | BUCK3_FPWM | 0x00 | AUTO mode | 0x01 | Forced PWM | FALSE |
0x09 | SLEW_RATE3 | 0x04 | 3.8 mV/us | 0x05 | 1.9 mV/us | FALSE |
0x0A | BUCK0_VSET | 0x0A | 600 mV | 0x61 | 1100 mV | FALSE |
0x0C | BUCK1_VSET | 0x0A | 600 mV | 0x61 | 1100 mV | FALSE |
0x0E | BUCK2_VSET | 0x0A | 600 mV | 0x4D | 1000 mV | FALSE |
0x10 | BUCK3_VSET | 0x0A | 600 mV | 0x61 | 1100 mV | FALSE |
0x21 | TDIE_WARN_MASK | 0x01 | MASKED | 0x00 | UNMASKED | FALSE |
0x22 | RESET_REG_MASK | 0x00 | UNMASKED | 0x01 | MASKED | FALSE |
0x28 | PG3_SEL | 0x01 | Power-Good-threshold voltage | 0x00 | Masked | FALSE |
0x28 | PG1_SEL | 0x01 | Power-Good-threshold voltage | 0x00 | Masked | FALSE |
0x28 | PG0_SEL | 0x01 | Power-Good-threshold voltage | 0x00 | Masked | FALSE |
0x29 | HALF_DELAY | 0x00 | 0-15ms (DOUBLE_DELAY=0) / 0-30ms (DOUBLE_DELAY=1) | 0x01 | 0-4.8ms (DOUBLE_DELAY=0) / 0-9.6ms (DOUBLE_DELAY=1) | FALSE |
0x2C | EN_SPREAD_SPEC | 0x00 | DISABLED | 0x01 | ENABLED | FALSE |
0x2C | GPIO3_SEL | 0x00 | EN3 | 0x01 | GPIO3 | FALSE |
0x2C | GPIO2_SEL | 0x00 | EN2 | 0x01 | GPIO2 | FALSE |
0x2D | GPIO1_OD | 0x01 | Open-drain output | 0x00 | Push-pull output | FALSE |
0x2D | GPIO3_DIR | 0x01 | Output | 0x00 | Input | FALSE |
0x2D | GPIO2_DIR | 0x01 | Output | 0x00 | Input | FALSE |
0x2D | GPIO1_DIR | 0x01 | Output | 0x00 | Input | FALSE |
0x2F | GPIO3_OUT | 0x00 | Logic low level | 0x01 | Logic high level | FALSE |
0x2F | GPIO2_OUT | 0x00 | Logic low level | 0x01 | Logic high level | FALSE |
BR,
Samuli
Hi Ken,
Ah, you are correct. I fixed the table now. The right one is LP87564T-Q1.
BR,
Samuli