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BQ25180: Conflicting values between STAT0 and FLAG0 registers

Part Number: BQ25180

We noticed this interesting discrepancy:

if we read registers  STAT0 0x41 STAT1 0x00 FLAG0 0x20  you can see that FLAG0 indicates = VDPPM fault detected,

while none of the VDPPM bits are set in STAT0. Shouldn't VDPPM_ACTIVE_STAT be active as well?

So two questions:

1. Are these two the same things or do they indicate different situations- regulation vs fault? And what exactly is VDPPM fault ?

2. When do FLAGs bits get cleared in general vs STAT bits?

Our register settings are below:

STAT0 Charger: STAT0 : 0x21
STAT1 Charger: STAT1 : 0x00
FLAG0 Charger: FLAG0 : 0x40
VBAT_CTRL Charger: VBAT_CTRL : 0x46
ICHG_CTRL Charger: ICHG_CTRL : 0x23
CHARGECTRL0 Charger: CHARGECTRL0 : 0x24
CHARGECTRL1 Charger: CHARGECTRL1 : 0x56
IC_CTRL Charger: IC_CTRL : 0x87
TMR_ILIM Charger: TMR_ILIM : 0x4d
SHIP_RST Charger: SHIP_RST : 0x13
SYS_REG Charger: SYS_REG : 0x40
TS_CONTROL Charger: TS_CONTROL : 0x00
MASK_ID Charger: MASK_ID : 0xc0

  • Hi Igor,

    You're correct in saying that the DPPM_ACTIVE_STAT should also be active when the VDPPM fault is seen. Are you reading the registers all continuously? 

    I'm wondering if you caught the tail end of DPPM when it was active. 

    Are these two the same things or do they indicate different situations- regulation vs fault? And what exactly is VDPPM fault ?

    Yes, these are the same, the difference is one is a stat pin that will always reflect the DPPM status while the flag will show a 1 when the DPPM first occurs but then clear to 0 after being read. 

    DPPM happens when the SYS voltage decreases to VBAT + 0.1 V. If the voltage were to decrease further, then the charge current will begin to decrease to maintain the SYS voltage at VBAT + 0.1V

    When do FLAGs bits get cleared in general vs STAT bits?

    The flag bits will be cleared once read. The STAT bits will always reflect the status (Active or Not active) of the field that are trying to show.

    Best Regards,

    Anthony Pham

  • Thank you, this clarifies things a bit.

    Are FLAG bits what's used for generating interrupts?

    And secondly, are we correct in assuming that If FLAG bit is 1 and we read it, it goes to 0. But what if  the condition is still true, when is the value set to 1 again?