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TPS6521815: When to follow power up and power down sequences very strictly.

Abhi Choksi
Prodigy 20 points
Part Number: TPS6521815
Other Parts Discussed in Thread: TPS65218

We have checked the specification of this part and it fits our processor requirement.

I am trying to find solutions of below queries and need help.

(1)In which kind of applications we need to follow power up and power down sequences very strictly.? I have seen some of processors for which power up sequence Timing parameters are violated but still it works fine. i have also seen some processors in which there is no care taken for power down sequence still it works fine. Why its so? and in which applications we need to worry about above cases.

(2)Can we violate power up sequence timing parameters? What effect it may have on processor?

(4)Can we violate power down sequence? What effect it may have on processor?

(5)How to Control the power down sequence when there is sudden power cut in the system?

I already know that this is not query related to this specific part but please help me guys to understand this.

  • 0
    TI__Genius 17835 points

    Hi, 

    Thank you for using E2E. The questions in the previous message are related to the processor requirements and expected behavior/response. From the PMIC perspective, the TPS6521815 is user programmable and the EEPROM settings can be programmed to meet different power requirements. Which processor are you powering with TPS65218? If it is a TI processor, we can internally re-assign this E2E so you can get the technical support from our processor team. If it is a non TI processor/SoC, this request would need to be posted on the technical support platform from the corresponding Company who owns it.    

    Thanks,

    Brenda

  • 0 in reply to Brenda Diaz
    Prodigy 20 points

    This all are general queries and i don't want specific answers.

    Please forward this to processor forum if its suitable.

  • 0 in reply to Abhi Choksi
    TI__Genius 17835 points

    Hi,

    This request will be assigned to the Sitara processor team. They will be able to provide a response based on their processors. Please note, those are not generic questions and the response can vary based on the processor or SoC that is used as not all of them will have the same response. 

    Thanks,

    Brenda

  • 0 in reply to Brenda Diaz
    TI__Guru*** 133536 points

    Hi Abhi,

    As Brenda mentioned, the behavior is processor specific. We won't be able to provide further support without knowing which processor you use.

  • 0 in reply to Bin Liu
    Prodigy 20 points

    Can you answer below questions considering AM335X?

    (1)In which kind of applications we need to follow power up and power down sequences very strictly.? I have seen some of processors for which power up sequence Timing parameters are violated but still it works fine. i have also seen some processors in which there is no care taken for power down sequence still it works fine. Why its so? and in which applications we need to worry about above cases.

    (2)Can we violate power up sequence timing parameters? What effect it may have on processor?

    (4)Can we violate power down sequence? What effect it may have on processor?

    (5)How to Control the power down sequence when there is sudden power cut in the system?

  • 0 in reply to Abhi Choksi
    TI__Guru*** 133536 points

    I am routing your query to our AM335x power expert for comments.

  • 0 in reply to Bin Liu
    TI__Guru*** 135508 points

    Hello Bin,

    Tank you for assigning the thread.

    Abhi, 

    The power sequencing is not application dependent but processor dependent. The recommendation is to follow the power sequencing that is recommended in the datasheet. The device might work but the device performance is not guaranteed when the recommended sequencing and parameters are violated. 

    Violation of the parameters could affect the device startup, normal functioning or reliability. We do not have information on the effect of timing violation to share.

    Selection of a PMIC attached to the specific device is the easiest way to ensure power sequencing is followed.

    (5)How to Control the power down sequence when there is sudden power cut in the system?

    The PMIC along with the power supply design and indication of power failure can help control the power down sequence.

    Wanted to check if there is a design you are working and seeing some issue or doing some feasibility study ?

    Regards,

    Sreenivasa