The datasheet lists junction-to-case thermal resistance. Is this the junction to top of case or bottom of case thermal resistance? If it is bottom, what is the junction to case top thermal resistance?
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The datasheet lists junction-to-case thermal resistance. Is this the junction to top of case or bottom of case thermal resistance? If it is bottom, what is the junction to case top thermal resistance?
Joey,
Thanks for the interest in our FETs.
The junction to case is to the exposed metal tab on the bottom of the package.
The thermal resistance to the top of the package is no specified in the datasheet but we estimate this for the D2Pak package to be in the ~30degC/W typical range.
Thanks
Chris