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LMG3522R030-Q1: LD05V Fails Short

Part Number: LMG3522R030-Q1

We are using this part in an LLC resonant converter design, and have had it fail twice during test. The LD05V internal power rail fails short and the FET D-S remains open circuit. The schematic design is pretty much identical to the recommended design in the datasheet, with the recommended digital isolator is being used. The isolated power source voltage being provided to the part was monitored, and it is supplying a steady 11VDC. The part fails within a matter of seconds with no indications of stresses exceeding the part ratings, making it difficult to troubleshoot. I noticed that there was a related topic with the same failure, but there was no resolution described in the chain. Any pointers on a prior resolution or troubleshooting steps would be greatly appreciated.

  • Hello,

    To help understand your specific problem better, can you please provide the schematic used for your design? I would like to verify the connections to each LMG device.

    Also, would you be able to elaborate on the exact steps and corresponding failures you are seeing? If the devices are operating correctly, any failure would trigger the FAULT pin clearing it low (active low pin) and cause the whole device to shut down, which means the channel would stay open rather than closed. A quick thing to check now would be the FAULT pin signal to see what state it's in.



  • Zach,

    We may have discovered the issue. Our kelvin connection between the source pin on the FET and the driver reference shield is about 0.25" long, longer than it should be. We were able to use the Tektronix optically isolated probe to measure the voltage across this connection, and saw about 2V of ground bounce. We are taking measures to get a more direct connection, but it looks like a layout issue. We will be able to confirm shortly, then this issue will be able to be closed out.

    This part needs to have a perfect layout, no compromises.

    Thank you

  • It was confirmed to be a layout issue. The stray inductance between the kelvin connection at the FET source and the isolator/driver plane was too high. Added multiple vias in the source pad for the connection, and this reduced the inductance adequately. Without this, the ground bounce between the power and driver grounds would be enough to damage the driver interfaces.

    This chain can be closed.