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TPS7H1101A-SP: RCS Equation and Power GOOD Voltage

Part Number: TPS7H1101A-SP

Hi,

I had two questions regarding the TPS7H1101A-SP device.

1) For calculating the RCS value, I am a little confused as to what to use for the Vcs value. I have a Vin = 2.5V and Vout = 1.8V with Iout = 1.2A. I am not sure what I should use for Vcs. Can you please help?

2) For the Power Good signal, it seems in the datasheet and on the eval boards that it is pulled up to Vout. Is this necessary? Can I pull it to Vin instead? The reason why I am asking is that on one of my designs I am feeding this signal to an enable and the power good line would only be pulled up to 1V which is too low for my enable input.

Thanks!

Jeff

  • Jeff,

    I have a calculator that I am trying to release that will help answer question number one.  The flow has changed and it is holding the release up.

    In the mean time, I will send you and email directly and provide the calculator. 

    In short, Vcs is used for current sensing.  If you are not going to use this pin to sense current with an ADC, then it can be biased high or low with a 1k ohm resistor to insure that desired current limit mode is maintained.   Biased high for foldback mode, and low for constant current mode.    After I send you the calculator, you can ask questions if it does not make sense.  Using a 1k ohm (or directly shorting to Vin or Gnd) will insure that VCS does not cross the 0.544 V threshold that changes current limit mode.

    On Q2, you can bias PG to Vin.    The open drain output of  the PG pin can be pulled up to any values less than the absolute max value in of 7.5 V.

    Regards,

    Wade

  • Hi Wade,

    Thanks so much for the detailed information and providing me with the spreadsheet. It has been very helpful!

    I do have some follow on questions if you don't mind:

    1) Will the Ilim equations in the spreadsheet be added to the latest datasheet ( I couldn't find them in the datasheet)

    2) When choosing between foldback or constant current limiting, I chose foldback since it was defined in the datasheet. I couldn't find what constant current limiting actually does.

    3) If I am not using the CS pin for current sensing, I do not care about equations under the Current Sense block correct, other than pulling RCS high thru a 1K pullup (using foldback)

    4) I see that in the schematic tab, that Cff and Cx are in the schematic. Do I add these based on the calculations from the design tab? I don't see the Cff capacitor there.

    5) I am trying to enter in a valid value for COUTESR and am struggling. I see there is a plot of ESR for my capacitor over frequency, but it varies and unsure which frequency to choose. Any ideas?

    Thanks,

    Jeff

  • Glad it was helpful.

    Here are my comments:

    1) Will the Ilim equations in the spreadsheet be added to the latest datasheet ( I couldn't find them in the datasheet)

    They are there, but a little indirectly.   The equation 3 for calculating Rpcl, is essentially the current limit equation.

    2) When choosing between foldback or constant current limiting, I chose foldback since it was defined in the datasheet. I couldn't find what constant current limiting actually does.

    Constant current does need better description.  It is sometimes called brick wall limiting.   It will continue to output at the current limit rather than folding back to 1/2 current limit when the current limit is reached.

    3) If I am not using the CS pin for current sensing, I do not care about equations under the Current Sense block correct, other than pulling RCS high thru a 1K pullup (using foldback)

    Correct.

    4) I see that in the schematic tab, that Cff and Cx are in the schematic. Do I add these based on the calculations from the design tab? I don't see the Cff capacitor there.

    The calculator does not address stability and compensation, other than calculate a few values that may be helpful.  This is referenced back to the datasheet.  Section 8.2.1.7 covers this.  Cx and Cff are optional.

    5) I am trying to enter in a valid value for COUTESR and am struggling. I see there is a plot of ESR for my capacitor over frequency, but it varies and unsure which frequency to choose. Any ideas?

    Typically vendors use 100kHz as their published ESR value.    This value can be used if attempting to cancel out the zero introduced by the output cap and ESR using Cx.  This is not required.   You can assess your stability with simulations and evaluate if changes are necessary to improve stability.

    If this answers your question, please click this resolved my question.
    Regards,
    Wade