Good day!
What accuracy can be expected from the reset delay time (or the on-chip precision 220-nA current source)?
The min-typ-max values in the table in section 7.6 indicate a tolerance of +/-40%.
Is this the expected value for the accuracy over the whole range of delay times?
I.e. When I select a C_T capacitor based on the formula on page 11, the actual time delay will lie within +/-40% of the design value?
Does the accuracy depend on the duration of the reset dime delay?
I am mostly interested in the long delay range (around 10s), for which there are no min-typ-max values provided.
Is the accurace better/worse/the same for such long delay times?
Does the time delay change over the lifetime of the chip?
E.g. when I measure the delay directly after assembly of the PCB and then again 3 year later, will I measure the same delay time? Or does here again a tolerance of 40% apply?
Thanks a lot for your support!
Manuel