LM5140-Q1: lm5140 overvoltage damage device after it

Hi Tianyuan,

Please send a completed quickstart calculator for this design so we can check compensation. You can use 10k lower FB resistor (the value doesn't matter, it's just the ratio that sets the gain from VOUT to FB).

Regards,

Tim

The current sense resistors are quite low value here, 2mΩ and 3mΩ, giving very high current limit setpoints and possible inductor saturation (not to mention extremely high power loss at 2.2MHz). What is the load current requirement?

Note also that the RES cap is super low at 10nF, giving very short hiccup internal if current limit is engaged. 220-470nF giving a more reasonable hiccup time, allowing the regulator to cool down if a high current limit event is encountered. 

I would also recommend using 100nF boot caps; 1uF is quite high and may discharge the VCC caps at startup.

2.4k is too low as the Thevenin impedance will be less than 5kΩ. 

Ok, it would be good to send on a completed quickstart calculator so we can review the whole circuit.

ok great, thank you.

Thanks for sending the completed quickstart.

Note 2.2MHz is very high Fsw for these current levels (check the high-side FET loss in particular). Output cap ESR is a bit high at 10mΩ. The loop on the 5V side can be made faster than 19kHz. Also, the MOSFET gate charges seem quite high for the Rdson - more efficient 40V FETs are available.

I just checked the BUK9K6R2-40E FET - you should enter the Qg at Vgs = 5V (the gate drive voltage of the LM5140), it's about 19nC.

Note this is a dual FET, so thermally it is not really suitable for such high current. Better to use separate 5 x 6mm high-side and low-side FETs. Take a look at the FETs used in the LM25149-Q1 EVM.

Your explanation is correct. The loop is saturated and COMP is railed high when Vin is less than the Vout setpoint (dropout operation). The solution to speed up the recovery is to use high Rcomp and low Comp (the time constant here should be about 20us).

Regards,

Tim

Ccomp = Cc1, the cap that sets the zero. Lower capacitance helps COMP to recover faster. You can check with simulation also.

20us is a good tradeoff between a fast recovery of the COMP voltage and an acceptable zero frequency for loop performance. The time constant also is related to the load transient response settling time.

Regards,

Tim

27k should go with 1nF, not 10nF. This loop looks a little fast - try reducing the crossover frequency to ~80kHz with a slightly lower Rc value. Also, there is a discontinuity around 100kHz - it may be related to input filter damping. Try adding an electrolytic cap on the input with ~0.2Ω ESR to provide damping, where Cdamp = 4 x Cin_ceramic.

Regards,

Tim

Hi Zhihua,

The phase margin (phase at crossover) is 90 degrees, well above what you need. You can afford to go higher crossover and low PM, e,g, 60kHz, by increasing Rc to 20kΩ-25kΩ.

Crossover frequency is typically set at 10-15% of Fsw. However, 20% is the theoretical max. Also, the error amp pole can impact at high frequencies, so 100kHz is the practical max crossover recommended for this controller.

Regards,

Tim