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LM5109B: LO/HO output state in UVLO

Part Number: LM5109B

What is actually the state of the HO/LO outputs in case of UVLO? 

Are they high-impedance or driven low (as long as possible)?

  • Hi Alfred, 

    Thank you for your question. Please refer to the device datasheet, section 7.3.1 "Start-Up and UVLO" for details about UVLO behavior: "The UVLO circuit inhibits each output until sufficient supply voltage is available to turn on the external MOSFETs, and the built-in UVLO hysteresis prevents chattering during supply voltage variations. When the supply voltage is applied to the VDD pin of the LM5109B, the top and bottom gates are held low until VDD exceeds the UVLO threshold, typically about 6.7 V".

    Best regards,

    Leslie

  • Ah, my local datasheet from 2013 contained neither a section 7.3.1 nor this text. 

    As clear as can be, though I'd have preferred a high-Z (for particular reasons) ...