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TPS53667: How to Detect Damaged Phases in Multi-Phase Supply Circuit

Part Number: TPS53667

Hello,

I have some questions about TPS53667. The TPS53667 is used in a four-phase supply circuit together with CDS95490Q5MC. I can share the schematic off line if you need.

Questions

  1. When an external MOSFET damages in the multi-phase supply circuit, is there a way for the TPS53667 to identify which MOSFET is by its status register and so forth?
  2. Sometimes, 1b is read from a status register which is described "not supported and always set to 0." What happens to this register?
  3. Is there any operating condition that won't generate a switching pulse from the TPS53667?
    • If it's yes, how the TPS53667's status registers look like when it happens?
  4. Is there any operating condition that irregularly generates switching pulses from the TPS53667?
    • If it's yes, how the TPS53667's status registers look like when it happens?
  5. The section 7.6.2.3.33 of the data sheet says the CUR_SH_WARN bits (STATUS_MFR_SPECIFIC[5:3]) is "not supported and always set to 0" while the section 7.3.19 says, "The faulty phase can be read from STATUS_MFR_SPECIFIC[5:3]." Which is correct?
  6. What's the condition for the STATUS_MFR_SPECIFIC register to detect a phase fault?
  7. Can the TPS53667 detect which MOSFETs are when multiple external MOSFETs damage?
  8. Is there a way for the TPS53667 to individually stop generating switching pulses from certain phases?

Best regards,
Shinichi Yokota

  • Hello,

    I see the conflicting info with the STATUS_MFR_SPECIFIC[5:3]. I will need to get an EVM & do testing to get solid answers for this, which may take a few weeks.

    I can answer these questions today:

    3. If the output is disabled (such as a fault that causes shutdown), the controller will not generate switching pulses. You should be able to see if the output is off in Fusion in STATUS_WORD.

    4. During load transients, the controller will vary the off time, which can look irregular. If a power stage is very near the OC limit, this can also cause irregularity from occasionally hitting OC.

    8. Yes. If it detects a faulty phase, it will stop sending PWM pulses to that phase. You can also manually disable phases in the config.

    Thanks,

    Travis

  • Hello Shinichi,

    To answer the remaining questions, I used a 6 phase EVM and shorted phase 6 PWM to 1.7V while the board was running to tri-state the power stage. This causes both FETs in the power stage to disable, which causes a current sharing fault as that power stage will not carry current. Fusion showed this in the STATUS_MFR_SPECIFIC register:

    The controller raised bits 5,4, & 0.

    [5:3] reads 110 (6 decimal), indicating that phase 6 is having the current share issue.

    Bit 0 indicates a phase fault occurred.

    Answers to the remaining questions:

    1. Yes, in STATUS_MF_SPECIFIC [5:3]

    2. This is incorrect.

    5. 7.3.19 is correct.

    6. It detects that a phase is not sharing current properly.

    7. No, it cannot display which phases are having faults if there is more than one.