LM5060-Q1: Active Power Selection

Hi Murthy,

1. How many MOSFETS of PSMN4R8-100BSEJ does the IC LM5060QDGSRQ1 can drive safely without any issues?
   1. There is no limitation on how many parallel FETs LM5060 can drive. You need to consider that as the number of FETs in parallel increase, the turn ON and turn OFF time increases. 
2. I want to disable UVLO & OVP.(If I gave the fixed voltage source as a reference to this pin, Does this IC work ?
   1. yes, giving an external voltage source to UVLO and OVP should work. 
3. As per below Image My output voltage is transferring to my input, My PS1 is always active, If PS2 is not there. I am getting voltage at the input Pin due this my sensing getting effected.
   Please guide me, how to resolve it Sir ?
   1. This cannot be resolved. Hence, this device is not suitable for Power Mux applications.

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4. LM5060QDGSRQ1 is working properly for lower currents or No load. If we increase the Load or Current through MOSFET IC Switching off Mosfet Gate. If enable pin is High. Please let me know, How to disable this feature?
   1. This is not expected unless Overcurrent Fault is turning OFF the gate. Please verify the over current threshold using the design calculator available on https://www.ti.com/product/LM5060#design-tools-simulation