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TPS65218D0: Queries for the pins TPS65218D0PHPT

Joselito Go
Intellectual 2970 points
Part Number: TPS65218D0

Hi Experts,

Good day.

Our customer has the following questions. Please advise.

1. On page 3 SDA has an input arrow, and SCL has an IO arrow, However in the table on page 5, SDA is IO and SCL is input. please advise on this conflict.
2. Is the pin” AC_DET” one function or 2 separate functions? AC function, and another function DET?
3. The same question to #2, for pin 18 “IN_nCC”?
4. Is the thermal pad internally connected with any pin? and for external connection, it must be or should be connected to which pin? please add more details.
5. Is the SDA pin an open drain? also, is there a threshold for it?
6. Are these pins have high impedance PGOOD &PGOOD_BU?
7. Are the following pins below have thresholds?

Pin Name
1 IN_DCDC1
3 SCL
5 IN_LDO1
6 IN_LS3
11 GPIO1
12 IN_DCDC4
15 DCDC4
16 PFI
17 DC34_SEL
21 FB5
22 FB6
26 GPIO3
31 IN_LS1
32 IN_LS2
35 INT_LDO
36 IN_BIAS
37 IN_DCDC3
39 FB3
41 FB2
43 IN_DCDC2
44 PB
46 PWR_EN
47 FB1


Keep safe.

Regards,

Josel

  • 0
    TI__Mastermind 18585 points

    Hi Josel, 

    Please see my comments below in regards to your various questions. Be advised the majority of the information you ask about is located in the device datasheet linked here: TPS65218D0 Power Management for ARM Cortex-A8/A9 SOCs and FPGAs datasheet (Rev. B) (ti.com)

    1) Thank you for bringing this to our attention. Page 5 is correct in reference to the I2C interface pins SCL and SDA. The clock pin SCL is input only, while the data pin SDA is I/O to allow the device and host to each communicate. We will work on our end to fix the graphic on page 3. 

    2) The AC_DET pin serves one function, which is to be one of the options to control the power-up of the PMIC. How TI recommends AC_DET is connected depends on the input power source and is shown in section 5.3.1.16 on page 43 of the TPS65218D0 datasheet. For example, how to connect AC_DET depends if the overall system is battery powered or non portable. 

    3)IN_nCC only has one function. This function is described in the Pin Functions section of the datasheet on page 6 and included below. 

    4) The thermal pad should only be connected to the ground plane of the PCB. It is power ground for the TPS65218D0 device. Figure 8-2 on page 99 of the datasheet provides an example for PCB layout design in regards to the thermal pad. 

    5)Yes the SDA pin is an open drain. An external pullup resistor is required to pull the drain output high during data transmission. The high level and low level threshold voltages for SDA and SCL pins are described in the electrical characteristics section of the datasheet on page 17. SDA has a high level minimum of 1.3V and a low level maximum of 0.4V. 

    6)PGOOD pin is open drain output, and is high impedance state when all enabled rails are in regulation. It is driven low when an output rail is out of regulation range. The PGOOD_BU pin does not have a high impedance state it is internally driven high or low depending on whether DCDC6 and DCDC6 are in regulation or not. 

    7)

    • The majority of the pins you list have both absolute and recommended thresholds as defined in the Specification section of the datasheet which begins on page 7. For example all the input pins IN_xxx have thresholds defined in this section. PWR_EN, PB, PFI, SCL, GPIO1, GPIO3, and DCDC4 all have thresholds defined in this section as well.
    • Other pins such as FB1/2/3/4/5/6 do not have thresholds listed as they should only be connected to the output of their related rail or to ground if the rail is to be disabled.
    • Other pins such as INT_LDO and DC34_SEL do not have a threshold listed as they are only meant to connect a passive component (i.e. capacitor or resistor) to ground.

    Best Regards,

    Garrett