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LM74700-Q1: How to select N-MOSFET in circuit?

Part Number: LM74700-Q1

Hi, E2E

I'd like know the selection guide of N-ch MOSFET with LM74700-Q1.

In Datasheet, only described about Rds(ON) of MOSFET. 

I wondring about that how much capacity current for MOSFET driving in LM74700-Q1.

Our considering of the MOSFET Spec(BUK7Y2R0-40H) is below.

 - Vds = 40V

 - ID = above 120A 

 - Qgd = Max 27.3nC

 - Qtot = Max 90.5nC

Thanks. Best regards.

  • Hi Choi,

    Thanks for reaching out!

    We will get back on this by early next week.

    Best Regards,

    Rakesh

  • Hi Seong,

    LM74700-Q1 is an Ideal diode Controller which drives external N-Channel Mosfets to realize diode like behavior - reverse current blocking and input reverse polarity protection. The entire load current flows through the external Mosfets and hence there is no limitation on the amount of load current the LM74700-Q1 can operate. Although there are a couple of things you will have to consider while using LM74700-Q1 for high current design.

    1. High current design corresponds to more number of FETs in parallel. More FETs in parallel will increase the total gate capacitance of the FETs seen by the controller. Hence, given the constant sink and source current capability of the LM74700-Q1 Gate- higher gate capacitance would result in a little slower turn ON and turn OFF of the FETs.                                                                                  
    2. As the total/effective FET gate charge of the FETs driven by DGATE increase, the LM74700-Q1 capability to rectify the AC Superimposed  (ACS) signal at high frequencies decreases.

      For example, as you can see in the snapshot below, LM74810-Q1 can rectify 200 kHz ACS signal for a gate charge = 15nC but for a gate charge = 30nC, the LM74810-Q1 can rectify only a 100kHz signal.                                                                          

      For more understanding on this topic, please refer to  Ideal Diode Controllers for Active Rectification of AC Voltage Ripple

    3. The charge pump capacitor has to be increased  to 10x Sum of Ciss of all FETs in parallel