Hi team,
My customer is checking spec of LP3470A to utilize this on their project.
This has SRT(Set Reset Timeout) pin to make reset delay time by connecting external capacitor. (other similar device, it specified CT(Capacitor Time delay) pin)
But the reset delay is determined by three variables like : 1. CSRT(external cap), 2. RSRT(internal R) and 3. a constant(-ln(0.29) ).
And these parameter specs have min/max deviation : 1. generally it has +-15%, 2. 350k(min) 500k(typ) 650k(max), 3. -ln(0.36)/max, -ln(0.29)/typ, -ln(0.26)/min ...
So, the minimum and the maximum variation is expected +-40% than the typical spec's calculation. (Considered tD(no cap) as 50us fixed, and CSRT assumed ideal capacitor)
My question is : is it possible to add external pull down resistor on SRT (SRT pin to GND) which has less value than RSRT like 100k-ohm to accurate the range?
In my calculation with adding 100k external resistor, it has decreased to the min/max variation with -22% and +13% from +-40%. (And the variation become lesser when we use lower resistor value.)
If the answer is yes, then how low can we decrease the value of the external resistor?
One more question : How is the typical and min value of tD(no cap) ? (50us is maximum value)
FYI, some applications need sensitive reset timing, so please help to understand the supervisor IC better.
Thank you.
Ernest
