Other Parts Discussed in Thread: CSD87330Q3D, TINA-TI,
Hello TI Team,
I have used TI component "TPS51116RGET" in my design for DDR3L power requirement along with TI's MOSFET "CSD87330Q3D".
But I have been trying to simulate the same design for last 2 weeks and observed following issues-
With Cadence PSpice: - It showed some error and I couldn't resolve them (even tried with un-encrypted PSpice model) . Here I have attached recent error in PSpice
After this, I tried with TINA-TI. On TINA tool, I got VDDQ output voltage (around 1.35V) and VTTREF (around 0.675V). But VTT is coming completely out of range (below 0.5V).
I got above results on following operating conditions-
Load resistor @ VDDQ (SYS_1V35) => 1 OHM (1.35A)
Load resistor @ VTT (SYS_1V35) => 225 mOHM (3A)
Load resistor @ VTTREF (SYS_1V35) => 67.5 OHM (10mA)
Please see the attached circuit diagram that was used for the simulation-
Please see the attached simulation results of the above circuit using TINA-TI-
I tried with NO LOAD condition also and got following results-
Then, I tried in S5 mode also (S5== 5V and S3== 0V) and got following results-
For the reference please find attached my Schematic design (SCHEMATIC1_DDR3L.pdf) of this component-
Please help me out with this so that I can verify the Output Voltage Ripple.
Kindly Review my attached Schematic (SCHEMATIC1_DDR3L.pdf).
Thanks & Regards