BQ78350-R1: BQ78350-R1 Firmware update to R3

Hello Shirish,

There is link for the "BQ78350-R1 TRM Addendum for BQ78350-R3" in the BQ78350-R1 product page.

If TI is not going to release the firmware this document is confusing and make people think the R3 firmware is ready.

Anyway, the functions described in the document are needed to many users and I have seen (on different forum pages) that scheduled release date is end of September 2022.

I need to know if I can rely on TI with the needed functions or I need to build workarounds.

Best Regards,

Alexander 

Hello Alexander,

Thank you for the feedback. This thread has been assigned to an expert, so hopefully you will get a response soon.

Hello Alexander,

I am checking on whether we can release the firmware.

Hello Shirish,

Thank you for your support, waiting for the update.

Hello Alexander,

I received confirmation that the firmware can be released. We have started the release process. It may take a few days/weeks depending on how fast we get approvals from the different teams.

Hello Shirish,

Thank you for the fast reply.

While I waiting for the firmware official release is there a possibility to test it before? We already have several products that need this function.

Best Regards,

Alexander

Hello Alexander,

We cannot provide it without the appropriate export control approval and other formalities. I anticipate the release on ti.com will be faster.

The firmware is now available for download

Hi Shirish,

We tested the firmware, but it seems like it doesn't work like expected.

First, we are missing the bit CB_R_TEST in Manufacturing Status. By that, we don't know if cell balancing at rest is enabled or not by the MAC command.

Second, we don't know if the device is in REST modus. The quit current is met, so charging modus is exit, but we don't know if discharge or REST modus is entered. The REST bit is not turning red. So we don't know if it's our fault or a firmware bug.

MAC write of 0x0019 or Cell Balance At Rest write of 0x01 also doesn't do anything. 

The included ReleaseNotes.txt shows more functions than the .PDF file, so can you please also update the addendum file for the -R3? At the moment we don't know enough about the functionality to know if the problem is on our side.

Hello Robert,

I am not sure which bit and commands you are referring to. Can you point out the TRM sections?

About the first question: Its about chapter 3.2 of the addendum. That bit is still reserved (not visible), just like in the R2 firmware.

The second question is a question about rest/relax modus in general: how can one check if the chip is in rest/relax modus?

The third point I made was: Chapter 3.3 doesn't make any sense if the bit in chapter 3.2 isn't visible for us. Sending 0x0019 to MAC doesn't do anything(visible).

The fourth point I made, was about a part wich is added, with only the ReleaseNotes.TXT mentioning it. Its a read/write command. Somehow it ended up displaying two times in BQStudio. The ReleaseNotes.TXT says the following:

"This fix also adds a read/write command to enable or disable the cell balancing operation in REST mode without modifying the value of [CB_REST] DF bit, as well as to read back the status of the cell balancing operation in REST mode."

The TRM addendum doesn't say a word about it. The SMB command described and implemented in BQstudio is 0xB1.

We got something working. When the REST bit comes active (we have no clue why it takes so long before it came active), the balancing starts again. One big flaw here is, ALL cells have to be above the balance start voltage. So if you have a badly balanced pack with one cell below the balancing treshold, everything stops and no balancing is done. It should go balancing until all cells reach the lowest cell OR the balance start voltage to keep the pack from draining. Then, with the next charge, the balancing may be completed. For NMC cells, okay, lower your balancing treshold. But for LFP its just broken.

The rest bit can take approx 5 hours because it waits for battery relaxation. The characteristics of the battery determine this.

Hi Shirish,

Can you further explain the algorithm behind that? It would be pretty valuable to us to know which conditions are needed for the chip to enter the relax modus. We see it's working, but sometimes within minutes and somethimes not within a day.

Hello Robert,

Relax is when the battery voltage stops changing. For practical purposes it is reached when dv/dt is very small (there is a real threshold used by the algorithm). After a charge or discharge the chemical reactions in the battery will continue until equilibrium is reached and this causes the dv/dt

Hi Shirish, 

Thanks for the explanation. Can you give us the threshold for our documentation?

We are now understanding your algorithm. A bit unfortunate there is nothing written about it in datasheets or other documents.

This a concept that has its root in the impedance track algorithm. https://www.ti.com/lit/an/slua450a/slua450a.pdf

Typically dV/dt ​​<4uV /s