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LP55231: Minimum clock speed

Part Number: LP55231

Hi Team,

I read the datasheet of LP55231. It only specifies the Maximum clock speed, 400 kHz, but not the minimum. Do you know the Minimum clock speed required for the I2C interface?

Best Regards,
Tom

  • Hi Tom,

    The standard-mode I2C fscl is 100kHz and the fast-mode fscl is 400kHz, it will be better to follow these 2 frequencies to use I2C interface.

    Besides, did customer need lower frequency than 100kHz? It can work if you set SCL frequency to lower value, theoretically speaking, the SCL frequency doesn't have lower limit.

    Thanks!

    Ives 

  • Hi Ives,

    Thank you.  I have tried 100 kHz clock speed and it did not work. I will try 400 kHz later.

    By the way, I have another question on this LED driver, LP55231.

    Since I wanted the LP55231 is enabled all the time, so I tied the EN line to logic High (Ven = Vdd) by design, will the LP55231 recognize chip is enabled after powering up?  Or should I turn on the EN line after the LP55231 is powered up?  Your answer is very important to my design.

    Best Regards,
    Tom

  • Hi Tom,

    LP55231 will recognize chip is enable after powering up, but you should notice that the I 2C host should allow at least 500 μs before sending data to the LP55231 after the rising edge of the enable line.

    Thanks!