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UC1846: Using an external error amplifier with this part?

Part Number: UC1846

Hello,

I'm trying to use an external error amplifier (the ADUM3190) to manage voltage reading on the secondary side of a flyback converter and feeding it back to the input of the UC1846.

Are there any reference designs to show how the EA and comp pins may need to be configured to work with an external error amplifier?

  • The way I have this connected appears to be working okay, but there also appears to be a heavy limitation on the duty cycle for the device, much more than originally anticipated.

    For my application, I'm trying to create a 200kHz flyback converter. Currently I have the RT set to 5.49k and CT set to 1nF which sets the oscillator frequency to 400kHz which is done on purpose since I don't require the second output stage.

    On the bench, my application appears to hit a duty cycle limit of 39.5%. I know the device should be limiting to around 50% and probably a few more percent points off the top. Is there anything I can to to help get some duty cycle points back?

  • Hi Peter,

    It would be useful for me to see a schematic.  In any case, how did you connect pin 1, current limit adjust?  Maybe current limiting is truncating the duty cycle.  Also, what is the maximum voltage coming from the external error amplifier?  COMP voltage must be high enough to command maximum duty cycle.  Lastly, how did you connect the pins of the unused internal error amp?

    Eric

  • Hi Eric.

    I made a R2R ladder network to input into the current limit adjust pin. It's fed in from a micro. Measuring the inductor current directly, it didn't look like I was approaching my current limit per se, but I do know this pin is limiting the error amp's output by pulling it down some.

    For the error amp on the converter, I have EA+ connected to VREF directly, EA- connected to ground and comp tied to the EAOUT2 pin of the external error amp (which is pulled up to the VREF voltage)

    I am interested in the comp voltage part. How high does the comp voltage need to be for maximum duty cycle? Currently, it looks like with my setup, I can do a maximum of 3.5V at the comp voltage pin.

  • Hi Peter,

    You have to calculate the current sense voltage at ~50% duty cycle and set the current limit accordingly.  Current limit should not limit COMP voltage during normal operation or it will truncate the maximum duty cycle.

    The datasheet shows the COMP voltage is able to go as high as 4.3V min, 4.6 V typ.

    Eric

  • Notice the gain of the CS amp and the -0.5V offset from COMP pin to PWM comparator.

  • I ended up completely disabling the current limit pin by opening it up, such that the comp pin (around 5V) could go to the chip directly. This had still not adjusted the duty cycle in any discernable way.

    One thing that helped a bit was adjusting the RT and CT values. I went from my original selection of 5.7k 1nF to 10k, 560pF, which increased my limit to 42% from the chip. It appears that the switching frequency and these RT/CT values influence whatever may be internally limiting the duty cycle within the chip. Have you seen this issue previously?

  • Yes, the CT capacitor has to be fully discharged by an internal current source which creates a "dead time".  Smaller capacitor values will have less dead time, but don't go below the minimum value shown in the datasheet.

    Eric

  • Hi Eric, yes that appears to have been what happened after I debugged further on Friday. Because of how high frequency we require due to how the oscillator frequency is utilized in the controller, the deadtime eats into a significant portion of the available duty cycle percent.

    Would it be possible to rig up the controller using the sync pin and an external signal to eliminate the deadtime issue? I'm thinking of reserving additional I/O to sync the UC1846 to an external timebase similar to that shown in the app note https://www.ti.com/lit/an/slua075/slua075.pdf?ts=1673847285474 figure 8.

  • Hi Peter,

    The logic devices in the UC1846 requires some deadtime, even with an external SYNC clock.  The deadtime is set by the "high" time of the incoming SYNC clock (see below).  You can certainly use the SYNC input and it's on-time to determine the minimum deadtime.  The datasheet says the SYNC frequency can be set up to 1 MHz, so the deadtime would have to be fairly low.

    The UC1846 is a relatively old, bipolar controller so it requires more deadtime than newer, controllers.  Newer, faster controllers have a part number with an "A" suffix or "UCC" prefix.

    Regards,

    Eric