Dear Team,
Can you help me confirm if the SMBus of LM25066IAPSQX runs at 100KHz, what is the Thd:dat,min (Data hold time)? The datasheet runs at 10KHz->Thd:dat,min=300ns
Many Thanks,
Jimmy
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Hi Jimmy,
Thanks for reaching out. The data hold time, tHD:DAT, is independent of the clock frequency. As per the I2C specification, “A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the VIH(min) of the SCL signal) to bridge the undefined region of the falling edge of SCL.”
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