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LM5119: Buck controller makes audible noise depending on load and external supply voltage level

Florian Heim
Prodigy 10 points

Part Number: LM5119
Other Parts Discussed in Thread: TPS54061

Hello e2e-community,
I´m using an LM5119 buck controller in interleaved mode with external supply provided by TI TPS54061 to reduce power dissipation as shown in schematics below.
Key parameters are: 48V input voltage, 24V output voltage with 10A max. load for each channel.
During testing the new hardware I noticed audible noise depending on load condition and later on voltage level of external supply voltage. So as I investigated I found that regulator sometimes skippes pulses and sometimes lengthens pulses and when this behaviour occurs in the hearable frequency range it is noticeable when next to the PCBA.

For dimensioning the circuit I  followed LM5119_Quickstart Exel sheet.
LM5119_QuickStart_TI-e2e.xlsx

 First measurement below shows both swiching nodes and their inductor current without load.
Second measurement shows both nodes during 10A-load. I think this behavoir is described as sub-harmonic oscillation in the LM5119 data sheet and I modfied R_RAMP-resistor and C_RAMP-capacitor which already improved the behaviour. This was very noisy and the part changes are already included in schematic and excel above.


At further testing I disabled the 10V external supply and enabled LM5119 internal regulators at VCC1 and VCC2-pins which also seemed to improve the behaviour (=less pulse length variation =less audible noise).

I proceded to  modify the external supply voltage by disconnecting anodes of V1 and V3 and feeding a voltage from laboratory power supply to VCC1/2-pins.
When setting the lab supply at 10V the various puls length still occur in the hearable range, coursor  for C2 at 18kHz below at 20A load.

And with the lab supply set to 8V instead of 10V the frequency is at 23.5kHz in the example below and not noticeable anymore at 20A load.

After this i decided to ask for help here in this forum.
Is there a recommended range when using an external supply voltage? In the datasheet it says for VCC pins

I still have to modify the resistor divider of 10V-regulator to set it to 8V and check it at load condition.

Thanks in advance & BR
Florian

  • 0
    TI__Mastermind 28340 points

    Hello,

    I'm looking at this thread and will be post my answers early next week.

    Regards

  • 0 in reply to Mahmoud Harmouch
    Prodigy 10 points

    Much appreciated, thank you.

  • 0 in reply to Florian Heim
    TI__Mastermind 28340 points

    Hi Florian,

    The VCC supply voltage level should not affect the sub-harmonic oscillation. The VCC supply voltage has some affect on the driver dead time. Dead time is higher at lower VCC level. 

    Would you please do the following:

    1- change the gate drive resistor from 2.2 Ohms to 5.1 Ohms and try with the external 10V supply

    2- Change R39 to 10 Ohms, R40 to 29K and measure the loop across the 10 Ohms resistor

    Please let me know if changing the gate drive resistors fix the audible noise.

    Regards

  • 0 in reply to Mahmoud Harmouch
    Prodigy 10 points

    Hi Mahmoud,
    thank you for your response.
    Regarding 1-:
    I changed all the Gate-Resistors to 4.75Ohm (5.1Ohms are not available in our lab) and applied full load (24V / 10A per output) and it seems to improve the behaviour with 10V external supply.
    As shown in measurement below C1 (yellow) is ok and the measurements below shows a stable duty-cycle (green arrows).
    Channel C3 (blue) is still missing some pulses and duty-cycle is all over the place (red arrows).

    I got further improvement by changeing the HOx-gate-resistors to 10Ohm and keeping the LOx-gate-resistors at 4.75Ohm. But I´m still not able to apply full load to the regulator without audible noise. Do you have a suggestion for this issue, e.g. vary the Gate-resistors some more?

    Regarding 2-:
    I´ll plan to do this. If I understand you correctly you want me to measure the control loop stability (gain and phase margin)?

    BR
    Florian

  • 0 in reply to Florian Heim
    Prodigy 10 points

    I made some additional mesurements with 10V normal supply from TPS54061 regulator.
    C3: SW1, C2: HO1 (with 10Ohm-gate resistors), C4: LO1 (with 4.7Ohm-gate resistors)
    Normal operation without noise:

    "Noisy" operation at certain load condition:

  • 0 in reply to Mahmoud Harmouch
    Prodigy 10 points
    Mahmoud Harmouch said:
    2- Change R39 to 10 Ohms, R40 to 29K and measure the loop across the 10 Ohms resistor

    I made the changes as requested and this is the result without load. I used a Bode 100 for measurements and basically followed their app note from Omicron-Lab: DC/DC Converter Stability Measurement (omicron-lab.com)

  • 0 in reply to Florian Heim
    TI__Mastermind 28340 points

    Hi Florian, the loop looks stable.

    1- Did you measure the loop at full load? 

    2- What is the actual value of Rramp(R19, R20)and Cramp(C8, C9). Schematic shows 127K and 1nF.

    3- Did you try Rramp lower value i.e 120K or 110K?

    4- What Rramp value you tried so far?

    5- Can you increase C21, C22 to 10nF?

    I think the issue is due to slope compensation and noise.

    Regards

  • 0 in reply to Mahmoud Harmouch
    Prodigy 10 points

    Hi Mahmoud,
    regarding your questions:

    Mahmoud Harmouch said:
    1- Did you measure the loop at full load? 

    No it is measured at no load expect for some controllers, I estimate it to be about 200mA. I´ll try to measure it at full load this week.

    Mahmoud Harmouch said:
    2- What is the actual value of Rramp(R19, R20)and Cramp(C8, C9). Schematic shows 127K and 1nF.

    Yes these are the actual values.

    Mahmoud Harmouch said:
    3- Did you try Rramp lower value i.e 120K or 110K?

    I tried 120K and 127K. See next answer below.

    Mahmoud Harmouch said:
    4- What Rramp value you tried so far?

    200K- not good at all - sub-harmonic oscillation occured
    120K and 127K - much better until certain load condition, adding the 4.7Ohm gate-resistors to all gates improved, keeping 4.7Ohm at LOx and 10Ohm at HOx gates improved even further.

    Mahmoud Harmouch said:
    5- Can you increase C21, C22 to 10nF?

    Yes I´ll try it.

    Thank you & BR
    Florian

  • 0 in reply to Florian Heim
    TI__Mastermind 28340 points

    Hello Florian,

    Would you please give some detailed description on the load condition when lowering Rramp? What is the current range when is stable and when is not stable? 

    Did you try to check it at different supply input voltage? if the system can accept it such as 36V, 60V?

    Regards

  • 0 in reply to Florian Heim
    Prodigy 10 points
    Florian Heim said:
    5- Can you increase C21, C22 to 10nF?

    I changed both to 10nF and it showed no improvement.

  • 0 in reply to Mahmoud Harmouch
    Prodigy 10 points
    Mahmoud Harmouch said:
    1- Did you measure the loop at full load? 

    This is at 10A load.

    And this is the loop at 20A load.

  • 0 in reply to Mahmoud Harmouch
    Prodigy 10 points

    Regarding Would you please give some detailed description on the load condition when lowering Rramp? What is the current range when is stable and when is not stable? and 4- What Rramp value you tried so far? (It seems I can not quote those two senctences anymore...)

    I tried

    • 200k: already not stable with only idle load (~200mA) at 48V input voltage
    • 127k: stable until 17A at 48V input voltage
    • 100k: tried it today and i was able to draw 20A load at 48V input voltage
      Measurement of it is shown below of SW-nodes and inductor currents (AC-coupled).

    Rramp 100k, Cramp 1n, 48V input voltage, 20A load:

    Mahmoud Harmouch said:
    Did you try to check it at different supply input voltage? if the system can accept it such as 36V, 60V?

    Measurements below show SW-nodes and iductor currents. Can you derive something from them? It seems to me with Rramp and Cramp given below the regulator accepts nominal voltage and to a deegree higher voltages but has difficulties with lower voltages.
    According to Figure 11 in the data sheet the minimun duty cycle is 0.9 at 300kHz and should be able to handle the required duty cucly of 24V/35V=0.7.
    100k / 1n , 35V input voltage, idle load (200mA):

    100k / 1n, 35V input voltage, 15A load, not stable;

    100k / 1n, 58V input voltage, idle load (200mA):

    100k / 1n, 58V input voltage, 20A load, not stable:

    BR & thank you.
    Florian

  • 0 in reply to Florian Heim
    TI__Guru 67900 points

    Hi

    Today is US holiday and Mahmoud will get back to you tomorrow.

    Regards

    Yihe

  • 0 in reply to Florian Heim
    TI__Mastermind 28340 points

    Hi Florian,

    It seems the issue is related to ramp optimization. When you changed VIN, the sub-harmonic is worse at lower input voltage because the duty cycle is higher. Higher duty cycle needs more attention to slope compensation. I understood the design works fine with 100K Rramp. Is that right?

    Regards, Mahmoud

  • 0 in reply to Mahmoud Harmouch
    Prodigy 10 points
    Mahmoud Harmouch said:
    It seems the issue is related to ramp optimization. When you changed VIN, the sub-harmonic is worse at lower input voltage because the duty cycle is higher. Higher duty cycle needs more attention to slope compensation. I understood the design works fine with 100K Rramp. Is that right?

    Hi Mahmoud, it works now with 100k / 1n now from 35V-52V. I still need to investigate why it won´t work above 32V but I think this is a separate issue.
    I found an isse in the layout where there was an unintended capcitive path for currents when the board is mounted to it´s cooling plate. Removing this connection improved the behaviour very much already.

    Thank you for your support.
    BR Florian