I am planning to use 3 LP8756x devices to power an SOC.
I am considering delivering 3 individual 2MHz CLKIN clocks to the 3 devices at 0, 30, and 60 degree phases.
Will that result in guaranteed 12 phase switching across the 3 devices?
I see the internal LP8756x PLL generates an internal 24MHz clock. I am unsure if the phase relationship to the incoming 2MHz clock is preserved, or if it can vary. If it can vary, this fancy clocking scheme would not be worth much.
