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LP3878-ADJ: LP3878MR-ADJ

Part Number: LP3878-ADJ

Good morning,
I am writing about a doubt that arose while reading the LP3878MR-ADJ datasheet.

In the component datasheet, on page 3, it is written

DO NOT CONNECT. Device pin 2 is reserved for post packaging test and calibration of the LP3878-ADJ VADJ accuracy.

This pin must be left floating.

Do not connect to any potential.

Do not connect to ground.

Any attempt to do pin continuity testing on device pin 2 is N/C 2 discouraged.

Continuity test results will be variable depending on the actions of the factory calibration.

Aggressive pin continuity testing (high voltage, or high current) on device pin 2 may activate the trim circuitry forcing VADJ to move out of tolerance.

In our In Circuit Test (by HP3070) we typically test all pins, even unconnected pins, to verify that these pins, after the reflow soldering process, are not shorted to other pins.

In this case we would like to check if pin 2 is shorted with pin 3. Could this procedure cause problems for the component?

If not, what result should we expect? Is pin 2 a three-state pin and so should it be high impedance or could pin2 be internally shorted to pin 3?

 Best Regards