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LP87524P-Q1: How to setting the switch frequency through adjusting registers

Part Number: LP87524P-Q1

我们想把LP87524开关频率配置成20MH或者10MHz。寄存器如下配置。但是配置不成功,是什么原因?

LP87524 PMIC register 0x2B 设置为 0x89@ CLKIN = 10MHz

0x2B 设置为  0x49@CLKIN = 10MHz

0x2B 设置为  0x93 @CLKIN = 20MHz

  • Hi Lei Tao Tao,

    For best support please submit your question to https://e2echina.ti.com/

    or resubmit the question in english.

    Thanks,

    Daniel W

  • Hi Daniel,

    According to LP87524P datasheet,the switch frequency could not be modified.

    • write 0x2B = 0x92,read 0x1E = 0x00,fsw=4MHz
    • write 0x2B = 0x53,read 0x1E = 0x00,fsw=4MHz
    • write 0x2B = 0x49,fsw=4MHz
    • write 0x2B = 0x93,fsw=4MHz
    • write 0x2B = 0x89,fsw=4MHz
  • Hi Lei Tao Tao,

    Register 0x2B is to set the expected switching frequency of the external clock. It does not adjust the internal clock frequency.

    Thanks,

    Daniel W

  • Hi Daniel,

    Register 0x2B is could not set Fsw under FPWM mode.

    Under AUTO mode(BUCKx_FPWM bit=0),CLKIN from external clk source=20MHz,change 0x2b=4F,test FSW maxim=5MHz

    • write 0x2B = 0x49,fsw=4MHz
    • write 0x2B = 0x4F,fsw=5MHz(MAXIM)
    • write 0x2B = 0x53,fsw<4MHz
    • write 0x2B = 0x89,fsw=4MHz
    • write 0x2B = 0x92,fsw=4MHz
    • write 0x2B = 0x93,fsw=4MHz

    So what is the internal processing logic from CLKIN→Internal 24MHz→Fsw?

     

  • Hi,

    I am looking into this but have been delayed by many requests today. Please expect a response by Wednesday.

    Thanks,

    Daniel W

  • Hi Lei,

    The switching frequency is described in the below spec

    The switching frequency cannot be set to 24MHz. The register you are changing only adjusts the expected frequency of the external clock.

    Thanks,

    Daniel W

  • Hi Daniel,

    Thank you for your support! It is like the FSW is fixed to 4MHz(VOUT>1V),and could not be changed by CLKIN or 0x2b.

    Below is the reply from your priduct line:

    -----------------------------------------------------

    In the system level, If you different clocks operating at different frequency and different phase then it could cause electromagnetic interference on other signals nearby.  This would recreate noise etc. 

    So, idea of having CLKIN is to utilize the same clock in the system that doesn’t have different frequency or phase shift. In this way the possibility of crosstalk within system decreases.

      

    Answers to  your questions.

     

    But before that in all three case, EXT_CLK_FREQ[4:0] is not correctly used. I am explaining (a), only one and you should be able to understand for the rest (b) and (c).

     

    1. So according to the data sheet section 7.3.2, the PMIC would expect external clock ( on CLKIN pin) set by EXT_CLK_FREQ (0x2b) register bits which should be -30% /+10% accuracy limit.

    Here in this case, customer has set 0x2b = 4F ( 0100 1111b) which means the last highlighted five bits are set to 01111b ( 0xFh). And according to the register map in the data sheet (see below)

    This 0xF value should set PMIC external clock expectation of 16 MHz. Whereas customer is feeding 20 MHz to the PMIC which is way above the accuracy limit of increased 10%.

    So, that is why they are seeing different frequency. Because the PLL of device is unable to adjust to what you are feeding to it.

     

    The correct configuration should be  written as 0x2b= 53 (in binary 01010011b). So the last five bits are set to 0x13 which according to register map select 20MHz frequency.

    In this case, PMIC will have correct  switching frequency 4 MHz for the regulators.