HI team,
my customer finds its CHRG_OK signal keep high and low constantly
they checked 0x20 fault register, but nothing trigger.
something is not right, is there a direction for us?
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HI team,
my customer finds its CHRG_OK signal keep high and low constantly
they checked 0x20 fault register, but nothing trigger.
something is not right, is there a direction for us?
Hi Fred,
I would suggest monitoring the system current and adapter current as well. It looks the VSYS is pulled to low when the CHRG_OK asserted.
Regards,
Tiger
Hi Tiger,
here's adapter current and discharge current in IBAT.
but like I said, there're no fault in 0x20, and VBUS is normal.
so we're confused what's the root cause.
please guide us, thanks
Hi Fred,
I noticed STAT_VDPM was triggered the PROCHOT status. You can lower the input voltage register 0x3D to see if it continues to trigger VINDPM.
For debugging purpose, you may enable other PROCHOT options bit to see if which event triggers.
Regards,
Tiger
Hi Tiger,
got it, but VDPM is not one of trigger condition of CHRG_OK.
is this correlated?
Hi Fred,
You knew there is something going on in the system. PROCHOT could use as a debug tool, and see which event is triggered.
When one of SYSOVP, SYSUVP, ACOC, TSHUT, BATOVP, BATOC or force converter off faults occurs, CHRG_OK is asserted LOW.
Regards,
Tiger
Hi TIger,
but what I mean is prochot is not the trigger condition to CHRG_OK,
0x20 covers all the SYSOVP, SYSUVP, ACOC, TSHUT, BATOVP, BATOC or force converter off fault.
and like I said they haven't seen any item being triggered.
they found oscillation of CHRG_OK is still happening after they fixed VDPM. and VBAT seems stable only Vsys is dropping every cycle.
please guide us for next step.
please also see schematic.
It looks the EXTILIM is set at 500mA, while the adapter current is higher than the current limit. Maybe you can disable IINDPM and try if it is related to ILIM.
Regards,
Tiger
Hi Tiger,
but they didn't enable EXT_LIM bit,
why would you suspect this one?
I think we need to set up a meeting and gather other people in to help on this, customer is waiting urgently.
Did you try our suggestions? Feel free to call a meeting and provide the schematic, layout and register maps.
Hi Tiger,
we did, it's not helping.
update more waveform and EC log
below is the EC log,
I do see they keep writing 0x15(max charge voltage) to 8.8V every 3 sec which is would be BATOVP in 3S setting, right?
please help double check carefully .
"229C" is 8.856V, please help check
\
Hi Fred,
Great progress on troubleshooting this issue.
The EC log showed periodically write "229C" (8.856V) to max charge voltage register. It would trigger BATOVP for a 3S battery. The BATOVP is not a latched fault. When a new value "3390" (13.2V) is written, it is back to normal operation. Thus showing as a periodical CHRG_OK assertion low.
In the future, we could monitor SDA/SCL together with CHRG_OK signal. This way, we can trace back to the EC command quickly.
Regards,
Tiger