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TPS65216: BUCK SW pin voltage derating

Part Number: TPS65216
Other Parts Discussed in Thread: TLV62569

There is a negative voltage -0.52 found at L3 pin (SW pin for DCDC3) of the TPS65216. 

1. How come there is a negative -0.5V happens? Is this behavior ok?

2. In the d/s, it only specifies the voltage rating to -0.3V. it is DC value? How about the AC value/transient value?

  • Hi Brian,

    1) What is the value of L3 inductor and total output capacitance for DCDC3?

    2) What are the specific loading conditions of DCDC3 when this scope capture was taken?

    Regards,

    James

    1. What is the value of L3 inductor and total output capacitance for DCDC3?

    Ans:L3 value is 0.15uH and total capacitance is 10uF

    2) What are the specific loading conditions of DCDC3 when this scope capture was taken?

          The DCDC3 output for the AMIC110BZCZA 1.5VD Power load.

    however, pls comment on if the spike voltage could damage the device? And what’s the max voltage rating in AC value?

    regards

    Brian

  • Hi Brian,

    Was this perhaps a typo? The L3 inductor has a minimum limit of 1uH so if you are using 0.15uH I would recommend switching to at least 1uH. The inductor value can be a max of 2.2uH so you may need to consider a larger inductor value.

    Regards,

    James

  • Hello James,

    Pls see here further info. thanks. 

    1) Yes, it was a typo! The real inductor on customer board is using 1.5uH. 

    2) The negative spike voltage of -0.5V happens on every switching cycle. and it's the same behavior on other board we verified. 

    And this behavior not only happens on DCDC3, and also it happens on the other rails (DCDC1, DCDC2 and DCDC4) of the device

    Please help to check root cause and how to improve negative spike voltage. And may i know the AC transient value voltage derating for the SW pin? In the other Buck converter, it has addressed this AC spec. 

    Here is the 1.5V rail with chock current. 

      

    here are more screen shop for your reference.

    CustomerMeasurements.zip

    Regards

    Brian

  • Hi Brian,

    Thanks for the additional information. 

    Can you share an example of AC SW derating spec you are looking for? I want to make sure I fully understand the spec you are seeking.

    I will do some testing on my end and get back to you within 3 business days.

    Regards,

    James

  • pls check the TLV62569 SPEC from LVB team.

    However, you already addressed that it is over the voltage stress to customer before. Customer quality team is now looking at this overstress problem, and regarding it as an important design requirements. Pls comment it.

    We wondering to know the same issue on EVM?

    Very thanks. 

    Regards

    Brian

  • Hi Brian,

    I'll take a look on the EVM and provide an update in the previously mentioned time frame.

    Regards,

    James

  • Hi Brian,

    I was able to confirm that the SW behavior you are seeing is actually the expected device behavior. The SW pin voltage is expected to go below -0.3V when the body diode of the LS FET is conducting current.

    It doesn't look like there's a specific spec for negative voltage spike on the SW node for this device but the lower threshold can be a low as -2V in some cases (according to some other spec examples I found).

    Generally speaking, damage to a pin can occur even with fast transients but the SW node is rated to handle this behavior. I saw the same type of waveform on the EVM I tested in the lab with both PWM and PFM operation (across all DCDC converters). 

    I will amend my original statement since damage to the part is unlikely with this knowledge. However, I will make a note of the negative voltage spec for a potential datasheet update in the future. Again, this behavior is expected and should not cause problems with the IC.

    Regards,

    James

  • Thanks James. Two further questions here.

    1. How does the negative spike voltage generate when current goes down to 0A and then L/C parameters starting to oscillation?

    2. When the updated d/s is avaliable? Since DELTA quality team is prohibition of finish goods shipment in customer side. DELTA is urgent to get confirmation about this. Pls help to push updated d/s. thanks.  

     
  • Hi Brian,

    1) This is part of the discontinuous conduction mode operation. When the inductor current reaches zero, both FETs are closed by the converter and the SW node is left floating which causes ringing at very low loads due to parasitic L and FET capacitance C. The body diode of the LS FET will conduct in these cases when the SW node is driven to a negative voltage briefly.

    These application notes have additional details:

    Understanding the Absolute Maximum Ratings of the SW Node (Rev. A)

    Understanding Mode Transitions for LMR33620/30 and LMR36006/15

    2) The d/s update is not a guarantee so I cannot specify a date and time. Such an update would require additional testing and internal verification before anything official is released so there are other parties that must authorize the procedure. Since this is an older device it is difficult to get datasheet updates through without large business justifications. You would need to reach out to the marketing team to put forward such a justification.

    Regards,

    James

  • Hello James,

    Thanks for INFO. Customer would like to get more solid information so that the customer project can be keep going smoothly. 

    1. What're an exactly max. overstress voltage and its duration time at SW pin?

    2. When the verification for voltage stress can be done 

    Regards

    Brian 

  • Hi Brian,

    James is out of office today due to US holiday. They will be back Monday to look over your inquiries.

    Best,

    David

  • Hi Brian,

    1) I can double check to see if we have more information on the SW pin voltage ratings and let you know what I find in the next two business days. 

    2) Verification of this sort isn't planned at the moment since this is an older device and characterization to failure isn't part of device development. The absolute max ratings come from process technology. This device only specifies an absolute max for the DC condition but many new device datasheets also include a max AC transient spec. It is not currently feasible to update the electrical tables for an older part that has already been on the market for a number of years.

    Regards,

    James

  • Hi Brian,

    After checking with some internal teams, we confirmed that no official AC transient spec is present for the TPS65216 specifically. It was noted that some other similar PMICs have this spec such as the TPS65219, shown below. This is the closest written evidence I can provide since the spec is unavailable for the TPS65216.

    This spec matches some of the other statements I was given from internal teams about SW pin resilience against AC transients. Although we do not have a written spec for the TPS65216, all the sources I have referenced suggest that the negative voltage you see on the SW pin should not be an issue. 

    Regards,

    James