Other Parts Discussed in Thread: TPS62800
Hi Sir,
could help provide TPS62867 tDELAY and tRamp tolerence CP distribution report ? because the electrical characteristics and application curves are different ,
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Hi,
The tdelay specification is valid when the resistor is 249kOhm. This corresponds to the longest possible tdelay. Smaller resistor values, like the 18.7k used to the take that waveform, will give shorter tdelay times as the R2D converter reads the resistor.
The TPS62800 D/S has a similar R2D converter circuit and shows some timings with different values:
The start-up delay time, tStartup_delay, varies depending on the selected VSEL value. tStartup_delay is shortest with VSEL = 0 and longest with VSEL = 16. See Figure 9-42 to Figure 9-46.
Thanks,
Chris
Hi Chris,
We use TPS62867 with adjustable output mode VSLE/MODE connected to GND instead of fixed mode.
Is the tDelay setting of the adjustable output mode the same as the fixed mode?
And we want to know when VSEL=0, which is tDelay (MIN,TYP,MAX) period.
Thanks.
Hi Yu Mei,
The D/S waveform was taken with VSET/MODE at GND. (It was not at 18.7k as I said before.) So, it shows the typical delay time of 400 usec.
The tolerance is not specified for this condition.
Chris
Hi Chris,
Because another DCDC CONVERTER tdelay cause some problem in our PCB, about tdelay if too long will cause IC leakage issue.
The typical 400us is short enough, but if we want to use TP62867 we still need to confirm what’s tolerance about tdelay at vesl/mode tie too gnd.
Can you provide the data to me? Thank you.
Thank you for explaining Yu Mei.
tdelay is specified to be 1100 usec at most. Your GND connection of the VSET/MODE pin will give a shorter tdelay than this. Is 1100 usec short enough?
Do you need to account for the tramp time as well, or just the delay time?
Chris
Hi Yu Mei,
What are your requirements for the tdelay and tramp timings?
What are your Vin, Vout, and Iout requirements? If the existing timings are too long for your needs, we have other devices to look at.
Thanks,
Chris