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TPS784-Q1: Thermal resistance question

Part Number: TPS784-Q1


Hi team, 

May I know how these two different thermal resistance value means? my understanding is the value in table also using JEDEC 1s0p board for testing, right? if customer using FR 4layer PCB, how to estimate the thermal resistance for their case? Thank you

Best regards, 

Scarlett

  • Hi Scarlett,

    The thermal metrics are normally using the JEDEC High-k board layout, which is 2s2p. If their layout has thermal vias under the thermal pad that connect to an internal ground plane and they have ground copper on the top and bottom layers (in particular same side as the device) that also connect to the thermal pad ground, they can expect the thermal resistance to be better than the datasheet metrics.

    Regards,

    Nick