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TPS65220: I2C compatible with AM64xx I2C LVCMOS buffer type?

Part Number: TPS65220

Hello,

According to PMIC TPS65220 SLVSGY1 – DECEMBER 2022, I'm not able to find information about I2C electrical specification interface .

I plan to use TPS6522053 with AM64 which have some I2C interface not really Open Drain (i.e. LVCMOS buffer type).

Is there any issue to use any I2C M64 interface connected to TPS65220? 

( SPRACU5B – JUNE 2021 – REVISED AUGUST 2021 chap 2.12 talk about to fast falling edge <2ns not compatible with I2C standard ).

Thanks for your help.

  • Hi,

    Thank You for using E2E! The AM62 SK EVM uses I2C0_SCL / I2C0_SDA to communicate with the TPS65220 PMIC by I2C. Table 6-12 in the first capture below shows the electrical spec for the PMIC I2C pins. Let us know if there are any questions. 

    Thanks,

    Brenda

  • Hello Brenda,
    Thanks for your reply.

    Concerning the first capture, I'm able to find it into SLVSGY1 – DECEMBER 2022 , is there any new datasheet revision available?

    Concerning my question : Are all AM64 I2C interfaces compatible with TPS65220? Especially I2C1/I2C2/I2C3 which are not full I2C compliant with standard (LVCMOS buffer type). Is there any risk to use it with TPS65220?

    Thanks for your help

  • Hi,

    This E2E will be reassigned to the processor team so they can comment on the AM64 I2C pins that can be used to communicate with the PMIC. 

    Thanks,

    Brenda

  • Hello Thierry,

    It is recommended to connect the PMIC on I2C0 bus of SoC only. Please refer to this Application Note for more details about using the TPS65220 PMIC with AM64x device.

    Regards,
    Senthil

  • Hello Senthil, 

    Thank you for the note.

    As i understand the I2C0 is recommendation to maintain the software compatibility.

    Any thoughts on this please.

    Regards,

    Sreenivasa

  • Hello Thierry,

    Please refer additional inputs i received from the device expert

    With respect to the post where the customer is asking about the compatibility 0f the LVCMOS I2C ports with other devices, there are two concerns. One is the faster than expected fall time and the other is the absolute max voltage. 

    Neither of these concerns are likely to cause a problem in most system implementations.

    The fall times of the LVCMOS IOs will be much faster than the max fall time defined in the I2C specification.  This rarely causes any problems for point-to-point connections since the biggest concern is under-shoot caused by the fast transition when applied to a multi-drop bus which can have stubs connected to the bus.  

    The absolute max voltage should not be a problem as long as they power the IOs of all I2C devices on the bus with the same IO supply and this supply remains in the range defined by our Recommended Operating Conditions.

    Regards,

    Sreenivasa